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ASM2I99456G-32-ET Datasheet(PDF) 8 Page - Alliance Semiconductor Corporation

Part # ASM2I99456G-32-ET
Description  3.3V/2.5V LVCMOS Clock Fanout Buffer
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Manufacturer  ALSC [Alliance Semiconductor Corporation]
Direct Link  https://www.alliancememory.com
Logo ALSC - Alliance Semiconductor Corporation

ASM2I99456G-32-ET Datasheet(HTML) 8 Page - Alliance Semiconductor Corporation

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June 2005
ASM2I99456
rev 0.2
3.3V/2.5V LVCMOS Clock Fanout Buffer
8 of 14
Notice: The information in this document is subject to change without notice.
VCC
VCC ÷2
GND
DC (tP ÷T0 Χ 100%)
tP
T0
The time from the output controlled edge to the
non-controlled edge, divided by the time output
controlled edge, expressed as a percentage.
tR
VCC = 3.3V VCC = 2.5V
2.4
1.8V
0.55
0.6V
tF
Figure 5. Output Transition Time Test Reference
PCLK
PCLK
QX
VPP
VCMR
VCC
VCC ÷2
GND
tP(LH)
tP(HL)
Figure 6. Propagation Delay (tPD) Test Reference
Figure 7. Output Duty Cycle (DC)
tSK(LH)
tSK(HL)
VOH
VCC ÷2
GND
VCC
VCC ÷2
GND
The pin-to-pin skew is defined as the worst case
difference in propagation delay between any similar
delay path within a single device
Figure 8. Output-to- Output Skew tSK(O)
tR
VCC = 3.3V VCC = 2.5V
2.4
1.8V
0.55
0.6V
tF
Figure 9. Output Transition Time Test Reference
Differential
Pulse Generator
Z=50
Z0=50
RT=50
VCC – 2V
VTT
RT=50
Figure 4. PCLK ASM2I99456 AC Test Reference for VCC = 3.3V and VCC = 2.5V
Z0=50
ASM2I99456 DUT


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