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ASM2I2313AGNZ-28-SR Datasheet(PDF) 10 Page - Alliance Semiconductor Corporation |
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ASM2I2313AGNZ-28-SR Datasheet(HTML) 10 Page - Alliance Semiconductor Corporation |
10 / 13 page June 2005 ASM2I2313ANZ rev 0.4 13 Output, 3.3V SDRAM Buffer for Desktop PCs with 3 DIMMs 10 of 13 Notice: The information in this document is subject to change without notice. IIC Serial Interface Information The information in this section assumes familiarity with IIC programming. How to program ASM2I2313ANZ through IIC: • Master (host) sends a start bit. • Master (host) sends the write address D3 (H). • ASM2I2313ANZ device will acknowledge. • Master (host) sends the Command Byte. • ASM2I2313ANZ device will acknowledge the Command Byte. • Master (host) sends a Byte count • ASM2I2313ANZ device will acknowledge the Byte count. • Master (host) sends the Byte 0 • ASM2I2313ANZ device will acknowledge Byte 0 • Master (host) sends the Byte 1 • ASM2I2313ANZ device will acknowledge Byte 1 • Master (host) sends the Byte 2 • ASM2I2313ANZ device will acknowledge Byte 2 • Master (host) sends a Stop bit. Controller (Host) ASM2I2313ANZ (slave/receiver) Start Bit Slave Address D3(H) ACK Command Byte ACK Byte count ACK Byte 0 ACK Byte 1 ACK Byte 2 ACK Stop Bit |
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