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ASM2I2310AGNZ-28-AT Datasheet(PDF) 1 Page - Alliance Semiconductor Corporation

Part # ASM2I2310AGNZ-28-AT
Description  3.3V SDRAM Buffer for Mobile PCs with 4 SO-DIMMs
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Manufacturer  ALSC [Alliance Semiconductor Corporation]
Direct Link  https://www.alliancememory.com
Logo ALSC - Alliance Semiconductor Corporation

ASM2I2310AGNZ-28-AT Datasheet(HTML) 1 Page - Alliance Semiconductor Corporation

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June 2005
ASM2I2310ANZ
rev 0.4
Alliance Semiconductor
2575, Augustine Drive
• Santa Clara, CA • Tel: 408.855.4900 • Fax: 408.855.4999 • www.alsc.com
Notice: The information in this document is subject to change without notice.
Serial Interface
Decoding
BUF_IN
SDATA
SCLOCK
OE
SDRAM0
SDRAM1
SDRAM2
SDRAM3
SDRAM4
SDRAM5
SDRAM6
SDRAM7
SDRAM8
SDRAM9
3.3V SDRAM Buffer for Mobile PCs with 4 SO-DIMMs
Features
One input to 10 output buffer/driver
Supports up to four SDRAM SO-DIMMs
Two additional outputs for feedback
Serial interface for output control
Low skew outputs
Up to 133MHz operation
Multiple VDD and VSS pins for noise reduction
Dedicated OE pin for testing
Space-saving 28 Pin SSOP package
3.3V operation
Functional Description
The ASM2I2310ANZ is a 3.3V buffer designed to distribute
high-speed clocks in mobile PC applications. The part has
10 outputs, 8 of which can be used to drive up to four
SDRAM SO-DIMMs, and the remaining can be used for
external feedback to a PLL. The device operates at 3.3V
and outputs can run up to 133MHz, thus making it
compatible with Pentium II
®i processors.
The ASM2I2310ANZ also includes a serial interface (IIC),
which can enable or disable each output clock. The IIC is
Slave Receiver only and is Standard mode compliant. IIC
Master can write into the IIC registers but cannot read
back. The first two bytes after address should be ignored
by IIC Block and data is valid after these two bytes as given
in IIC Byte Flow Table. On power-up, all output clocks are
enabled. A separate Output Enable pin facilitates testing on
ATE.
i Pentium II is a registered trademark of Intel Corporation
Block Diagram


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