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ASM2I2310ANZ Datasheet(PDF) 2 Page - Alliance Semiconductor Corporation |
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ASM2I2310ANZ Datasheet(HTML) 2 Page - Alliance Semiconductor Corporation |
2 / 12 page June 2005 ASM2I2310ANZ rev 0.4 3.3V SDRAM Buffer for Mobile PCs with 4 SO-DIMMs 2 of 12 Notice: The information in this document is subject to change without notice. Pin Configuration 28 Pin SSOP Package-- Top View Pin Description Pins Name Type Description 1, 5, 10, 19, 24, 28 VDD P 3.3V Digital voltage supply 4, 8, 12, 17, 21, 25 VSS P Ground 13 VDDIIC P 3.3V Serial interface voltage supply 16 VSSIIC P Ground for serial interface 9 BUF_IN I Input clock, 5V tolerant 20 OE I Output Enable, three-states outputs when LOW. Internal pull-up to VDD 14 SDATA I/O Bi-directional Serial data pin. Internal pull-up to VDD. 5V tolerant 15 SCLK I Serial clock input. Internal pull-up to VDD. 5V tolerant 2, 3, 6, 7 SDRAM [0–3] O SDRAM byte 0 Clock Outputs 22, 23, 26, 27 SDRAM [4–7] O SDRAM byte 1 Clock Outputs 11, 18 SDRAM [8–9] O SDRAM byte 2 Clock Outputs ASM2I2310ANZ 1 VDD 2 SDRAM0 3 SDRAM1 4 VSS 5 SDRAM2 6 SDRAM3 7 8 VSS 9 BUF_IN 10 11 SDRAM8 12 VDDIICC 13 14 SDATA VDD VDD VSS 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VDD SDRAM7 SDRAM6 VSS SDRAM5 VSS OE SDRAM9 VSSIIC SCLOCK VDD VDD VSS SDRAM4 |
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