®

$65<)343

$65<)343

$65<)343

$65<)343

####

','#4407333:0$1#72:233

','#4407333:0$1#72:233

','#4407333:0$1#72:233

','#4407333:0$1#72:233

$//,$1&(#6(0,&21'8&725

$//,$1&(#6(0,&21'8&725

$//,$1&(#6(0,&21'8&725

$//,$1&(#6(0,&21'8&725

6666

0RGH#WDEOH

Read mode: Selected with CE and OE low, WE high. Data is valid tAA after addresses are stable, tCE after CE is low and tOE after OE is low.

Output disable: Part remains powered up; but outputs disabled with OE pulled high.

Standby: Part is powered down, and ICC reduced to 1.5 mA for TTL input levels (<1.0 mA for CMOS input levels).

Mfr. (manufacturer) code, Device code: Selected by A9 = 11.5–12.5V. When CE and OE are pulled low the outputs are enabled and a data byte is read out.

When A0 is pulled low the output data = 52h, a unique Mfr. code for Alliance Semiconductor Flash products. When A0 is high DOUT = 03h,04h, 06h, the

Alliance device codes for the AS29F010.

Write command: Selected by CE and WE pulled low, OE pulled high. Initiates command mode in the WSM and latches addresses and data into the chip. Once

a write command starts, the WSM stays in command mode until the command is completed or it times out. Addresses are latched on the falling edge of WE

and CE, whichever occurs later; data is latched on the rising edge o WE and CE, whichever occurs first. The WE signal is filtered to prevent spurious events

from being detected as write commands.

&RPPDQG#IRUPDW

All commands require four bus write cycles to execute. After four write cycles the command is executed until terminated by the i nternal

and device code commands the ID code is read out. For other operations a read operation reads out a status byte on the outputs.

•

Any write cycle that follows more than 150 µs after the previous write cycle.

•

Once the error flag is set, the AS29F010 times out and returns to normal Readmode. The error flag remains until it is cleared by a reset

command. The error flag can be read by executing a status command and reading the status byte.

&RPPDQG#FRGHV#DQG#WLPH#RXW

a write command bus cycle before a valid read may be executed. Timeout indicates the maximum delay before the WSM returns the

the verify commands require a 25 µs delay to read valid data.

Mode

CE

OE

WE

A0

A9

DQ

Read

L

L

H

A0

A9

Output disable

L

H

H

X

X

High Z

Standby

H

H

H

X

X

High Z

Mfr. code

LLH

LVh

52h

Device code

L

L

H

H

Vh

CODE (03h,04h,06h)

Write command

L

H

L

A0

A9

Address in

Data in

5555h

AAh

2AAAh

55h

5555h

Command code

Address in

Data in

Bus read

Address in

Command timeout: For each operation the address and data are latched at

time-out the WSM returns the AS29F010 to normal mode. Each individual

operation requires the 4-cycle write command sequence to execute. The

AS29F010 does not remain in command mode after time-out. When a

command times-out only the error flag is not reset.