AS7C31024B-20STC datasheet(1/9 Pages) ALSC

Part #	AS7C31024B-20STC

Description	3.3V 128K X 8 CMOS SRAM

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Manufacturer	ALSC [Alliance Semiconductor Corporation]

Direct Link	https://www.alliancememory.com

Logo

1 / 9 page

March 2004

®

AS7C31024B

3.3V 128K X 8 CMOS SRAM

3/24/04, v.1.2

Alliance Semiconductor

P. 1 of 9

Features

• Industrial and commercial temperatures

• Organization: 131,072 words x 8 bits

• High speed

- 10/12/15/20 ns address access time

- 5, 6, 7, 8 ns output enable access time

• Low power consumption: ACTIVE

- 252 mW / max @ 10 ns

• Low power consumption: STANDBY

- 18 mW / max CMOS

• 6T 0.18u CMOS technology

• Easy memory expansion with CE1, CE2, OE inputs

• TTL/LVTTL-compatible, three-state I/O

• 32-pin JEDEC standard packages

- 300 mil SOJ

- 400 mil SOJ

- 8 × 20mm TSOP 1

- 8 x 13.4mm sTSOP 1

• ESD protection

≥ 2000 volts

• Latch-up current

≥ 200 mA

Logic block diagram

512 x 256 x 8

Array

(1,048,576)

Input buffer

I/O0

I/O7

OE

CE1

WE

Column decoder

Control

circuit

A0

A1

A2

A3

A4

A5

A6

A7

VCC

GND

A8

CE2

Pin arrangement

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

32

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

VCC

A15

CE2

WE

A13

A8

A9

A11

OE

A10

CE1

I/O7

I/O6

I/O5

I/O4

I/O3

NC

A16

A14

A12

A7

A6

A5

A4

A3

A2

A1

A0

I/O0

I/O1

I/O2

GND

32-pin SOJ (300 mil)

VCC

A15

CE2

WE

A13

A8

A9

A11

OE

A10

CE1

I/O7

I/O6

I/O4

NC

A16

A14

A12

A7

A6

A5

A4

A3

A2

A1

A0

I/O0

I/O1

I/O2

GND

I/O5

I/O3

1

2

3

4

5

6

7

8

9

10

11

12

13

14

32

31

30

29

28

27

26

25

24

23

22

21

20

19

15

16

18

17

32-pin (8 x 20mm) TSOP I

32-pin SOJ (400 mil)

32-pin (8 x 13.4mm) sTSOP1

Selection guide

-10

-12

-15

-20

Unit

Maximum address access time

10

12

15

20

ns

Maximum output enable access time

5

6

7

8

ns

Maximum operating current

70656055

mA

Maximum CMOS standby current

5

mA

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