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AS7C25512PFD32A-166TQIN Datasheet(PDF) 6 Page - Alliance Semiconductor Corporation |
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AS7C25512PFD32A-166TQIN Datasheet(HTML) 6 Page - Alliance Semiconductor Corporation |
6 / 19 page ® AS7C25512PFD32A AS7C25512PFD36A 2/10/05, v. 1.2 Alliance Semiconductor 6 of 19 Write enable truth table (per byte) Key: X = don’t care, L = low, H = high, n = a, b, c, d; BWE, BWn = internal write signal. Asynchronous Truth Table Notes: 1. X means “Don’t Care” 2. ZZ pin is pulled down internally 3. For write cycles that follows read cycles, the output buffers must be disabled with OE, otherwise data bus contention will occur. 4. Snooze mode means power down state of which stand-by current does not depend on cycle times 5. Deselected means power down state of which stand-by current depends on cycle times Burst sequence table Function GWE BWE BWa BWb BWc BWd Write All Bytes L X XX XX H L LLL L Write Byte a H L L H H H Write Byte c and d H L H H L L Read HHX XX X H L HH HH Operation ZZ OE I/O Status Snooze mode H X High-Z Read L L Dout L H High-Z Write L X Din, High-Z Deselected L X High-Z Interleaved burst address (LBO = 1) Linear burst address (LBO = 0) A1 A0 A1 A0 A1 A0 A1 A0 A1 A0 A1 A0 A1 A0 A1 A0 Starting Address 0 0 0 1 1 0 1 1 Starting Address 0 0 0 1 1 0 1 1 First Increment 0 1 0 0 1 1 1 0 First Increment 0 1 1 0 1 1 0 0 Second Increment 1 0 1 1 0 0 0 1 Second Increment 1 0 1 1 0 0 0 1 Third Increment 1 1 1 0 0 1 0 0 Third Increment 1 1 1 0 0 1 1 0 |
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