®

AS7C3256A

4/23/04; v.2.0

Alliance Semiconductor

P. 6 of 9

AC test conditions

Notes

2

This parameter is sampled, but not 100% tested.

3

For test conditions, see AC Test Conditions, Figures A, B.

4

These parameters are specified with CL = 5pF, as in Figures B. Transition is measured

5

This parameter is guaranteed, but not tested.

6

WE is High for read cycle.

7

CE and OE are Low for read cycle.

8

Address valid prior to or coincident with CE transition Low.

9

All read cycle timings are referenced from the last valid address to the first transitioning address.

10 N/A

11 All write cycle timings are referenced from the last valid address to the first transitioning address.

12 N/A

13 C=30pF, except on High Z and Low Z parameters, where C=5pF.

350

Ω

320

Ω

GND

+3.3V

168

Ω

+1.72V

Figure B: Output load

Thevenin equivalent

- Output load: see Figure B

- Input pulse level: GND to 3.0V. See Figure A.

- Input rise and fall times: 2 ns. See Figure A.

- Input and output timing reference levels: 1.5V.

10%

90%

10%

90%

GND

+3.0V

Figure A: Input pulse

2 ns