5

01.10.05 Rev 8

All data sheets are subject to change without notice

©2005 Maxwell Technologies

All rights reserved

Low Voltage 8 Megabit (256K x 32-Bit) EEPROM MCM

79LV0832

Output Voltage

Data Lines: V

RDY/BSY_Line: V

Data Lines: V

RDY/BSY_Line: V

All Outputs: V

V

OL

V

OL

V

OH

V

OH

1, 2, 3

--

2.4

2.4

V

0.4

0.4

--

--

V

V

V

V

V

1. All Inputs are tied to Vcc with a 5.5K

W resistor, except for RES which is 30KW.

2. For RES I

3. Only one CE active (low) at a time

(V

Address Access Time CE = OE = V

-200

-250

t

ACC

9, 10, 11

--

--

200

250

ns

Chip Enable Access Time OE = V

-200

-250

t

CE

9, 10, 11

--

--

200

250

ns

Output Enable Access TIme CE = V

-200

-250

t

OE

9, 10, 11

0

0

110

120

ns

Output Hold to Address Change CE = OE =V

-200

-250

t

OH

9, 10, 11

0

0

--

--

ns

CE = V

-200

-250

CE = OE = V

-200

-250

t

DF

t

DFR

9, 10, 11

0

0

0

0

50

50

300

350

ns

ns

RES to Output Delay CE = OE = V

3

-200

-250

T

RR

9, 10, 11

0

0

525

550

ns

1. Test conditions: input pulse levels = 0.4V to 2.2V; input rise and fall times < 20 ns; output load = 1 TTL gate + 100 pF (including

scope and jig); reference levels for measuring timing = 0.8 V/1.8 V.

2. t

3. Guaranteed by design.

(V