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29F0408RPFE Datasheet(PDF) 8 Page - Maxwell Technologies |
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29F0408RPFE Datasheet(HTML) 8 Page - Maxwell Technologies |
8 / 33 page 8 All data sheets are subject to change without notice ©2002 Maxwell Technologies All rights reserved. 32 Megabit (4M x 8-Bit) Flash Memory 29F0408 11.08.02 Rev 2 block information and create the invalid block table via the following suggested flow chart (Figure 1). Any intentional erasure of the original block information is prohibited. FIGURE 1. FLOW CHART TO CREATE INVALID BLOCK TABLE Error in write or read operation Over its lifetime, the additional invalid blocks may occur. Through the tight process control and intensive testing, addi- tional block failure rate is minimized which is projected below 0.1% until 1 million program/erase cycles. Refer to the qualification report for the actual data. The following possible failure modes should be considered to implement a highly reliable system. In the case of status read failure after erase or program, block replacement should be done. To improve the efficiency of memory space, it is recommended that the read or verification failure due to single bit error be reclaimed by ECC without any block replacement. The said additional block failure rate does not include those reclaimed blocks. ECC: Error Correcting Code Æ Hamming Code, etc. Example. 1-bit correction and 2-bit detection FAILURE MODE DETECTION AND COUNTERMEASURE Write Erase failure Status read after erase Æ Block replacement Program failure Status read after program Æ Block replacement Read back (verify after program) Æ Block replacement or ECC correction Read Single bit failure Verify ECC Æ ECC correction |
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