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PT5542N Datasheet(PDF) 5 Page - Texas Instruments |
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PT5542N Datasheet(HTML) 5 Page - Texas Instruments |
5 / 8 page Application Notes For technical support and more information, see inside back cover or visit www.ti.com PT5540 Series Features and System Considerations for the PT5540 Series of Boost ISRs Boost Regulator Topology and Characteristics Figure 1-1 shows a block diagram of the boost regulator circuit, which is representative of the PT5540 ISR series. Note that when the MOSFET switch is off, the output regulator is connected directly to the input via an inductor and schottky diode. Thus with the MOSFET switch inac- tive, the output voltage merely tracks the input voltage, less the forward voltage drop of the diode. Figure 1-1; Boost Regulator Block Diagram Output Capacitor Inductor PWM Control V IN V OUT COM MOSFET Switch Schottky Diode Vo (5V/Div) Vin (5V/Div) Iin (1A/Div) HORIZ SCALE: 40ms/Div Fiigure 1-2; Typical Power Up Waveforms for the PT5542 One of the characteristic of a boost regulator is that its input current is always higher than its output current. For example, a 12-W rated 5V to 12V boost regulator, operating at 80% efficiency, will demand 15W of input power. Thus a 1-A load on the regulator’s output will correlate to 3-A of input current from its source. And any fall (droop) in the input voltage will corrspondingly result in the input current rising further. The input current demanded by a boost regulator is therefore high, making it important that the regulator be connected to a low imped- ance source. Under-Voltage Lockout (UVLO) The PT5540 series of boost regulators incorporate an input under-voltage lockout (UVLO). The UVLO pre- vents operation of the regulator until the input voltage is above the UVLO threshold (see data sheet specifications). This prevents the regulator from drawing a high startup current during power up, and minimizes the current drain from the input source during low input voltage conditions. Note: Below the UVLO threshold, the regulator’s internal MOSFET is merely held ‘off ’, disabling its boost function. Under this condition the regulator will still produce an output voltage. This is the input voltage less the forward voltage drop of the internal schottky diode. Soft-Start Power Up When the input source voltage rises above the UVLO threshold voltage the regulator will initiate a soft-start power up. The soft-start circuitry introduces a short time delay and slows the rate at which the output rises to full regulation voltage. Figure 1-2 shows the power-up characteristic of a PT5542 (15V) regulator. After the application of the input voltage, Vin, there is a delay of approximately 100ms before the output voltage rises above the input voltage. This delay provides more time for a slow rising input source to reach the minimum operating voltage of 4.5V. The waveforms of Figure 1-2 were measured with a 5Vdc input voltage and 0.5-Adc constant current load. Input Source Requirements As the input current is much higher than the output load current, boost regulators are sensitive to source voltage impedance. This is especially during power up when a regulator attempts to start at too low an input voltage. The UVLO built into the PT5540 series reduces the input current during startup by disabling the boost function until the source voltage has almost reached the minimum oper- ating voltage of 4.5V. However, the UVLO circuitry will also promptly switch off the regulator if this voltage sags as the input current rises. This is often described as a “hiccup” effect. The module may hiccup at power up due to a combination of two conditions. The input voltage is rising too slowly and its source impedance is not low enough. To ensure a clean power-up the output impedance of the input source should be less than 25m Ω. A higher input impedance can be tolerated if the input voltage rises promptly and regulates closer to the nominal input voltage of 5V. |
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