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v3.1
11
54S X Fam ily F P G A s
PCI Complianc e fo r the 5 4 SX Family
The 54SX family supports 3.3V and 5V PCI and is compliant with the PCI Local Bus Specification Rev. 2.1.
A54SX16P DC Specifications (5.0V PCI Operation)
Symbol
Parameter
Condition
Min.
Max.
Units
VCCA
Supply Voltage for Array
3.0
3.6
V
VCCR
Supply Voltage required for Internal Biasing
4.75
5.25
V
VCCI
Supply Voltage for IOs
4.75
5.25
V
VIH
Input High Voltage1
2.0
VCC + 0.5
V
VIL
Input Low Voltage1
–0.5
0.8
V
IIH
Input High Leakage Current
VIN = 2.7
70
µA
IIL
Input Low Leakage Current
VIN = 0.5
–70
µA
VOH
Output High Voltage
IOUT = –2 mA
2.4
V
VOL
Output Low Voltage2
IOUT = 3 mA, 6 mA
0.55
V
CIN
Input Pin Capacitance3
10
pF
CCLK
CLK Pin Capacitance
5
12
pF
CIDSEL
IDSEL Pin Capacitance4
8pF
Notes:
1.
Input leakage currents include hi-Z output leakage for all bi-directional buffers with tri-state outputs.
2.
Signals without pull-up resistors must have 3 mA low output current. Signals requiring pull up must have 6 mA; the latter include,
FRAME#, IRDY#, TRDY#, DEVSEL#, STOP#, SERR#, PERR#, LOCK#, and, when used AD[63::32], C/BE[7::4]#, PAR64, REQ64#, and ACK64#.
3.
Absolute maximum pin capacitance for a PCI input is 10 pF (except for CLK).
4.
Lower capacitance on this input-only pin allows for non-resistive coupling to AD[xx].