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THERMAL CHARACTERISTICS

PARAMETER MEASUREMENT INFORMATION

60

Ω ±1%

0 or 3 V

_

+

DE

Y

Z

D

375

Ω ±1%

375

Ω ±1%

R

L

0 or 3 V

DE

Y

Z

SN65HVD50-SN65HVD55

SN65HVD56-SN65HVD59

SLLS666 – SEPTEMBER 2005

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

HVD50, HVD51, HVD52, HVD56, HVD57

230.8

Junction–to–ambient

HVD53, HVD54, HVD55, HVD58, HVD59

162.6

θ

JA

HVD50, HVD51, HVD52, HVD56, HVD57

135.1

Junction–to–ambient

HVD53, HVD54, HVD55, HVD58, HVD59

92.1

°C/W

HVD50, HVD51, HVD52, HVD56, HVD57

44.4

Junction–to–board

θ

JB

High-K board

thermal resistance

HVD53, HVD54, HVD55, HVD58, HVD59

61.1

HVD50, HVD51, HVD52, HVD56, HVD57

43.5

Junction–to–case

θ

JC

No board

thermal resistance

HVD53, HVD54, HVD55, HVD58, HVD59

58.6

HVD50, HVD56 (25Mbps)

420

Input to D a 50% duty cycle

HVD51, HVD57 (10Mbps)

404

square wave at indicated

HVD52 (1Mbps)

383

signaling rate

Device power

mW

HVD53, HVD58 (25Mbps)

420

dissipation

HVD54, HVD59 (10Mbps)

404

Input to D a 50% duty cycle

HVD55 (1Mbps)

383

square wave at indicated

signaling rate

Low-K board, No airflow

HVD50, HVD56

–40

55

HVD51, HVD52, HVD57

–40

84

Ambient air

HVD53, HVD54, HVD55, HVD58, HVD59

–40

85

temperature

°C

High-K board, No airflow

HVD50, HVD51, HVD52, HVD56, HVD57

–40

85

HVD53, HVD54, HVD55, HVD58, HVD59

–40

85

Thermal shutdown junction temperature

165

(1)

See Application Information section for an explanation of these parameters.

(2)

The intent of

θ

This methodology is not meant to and will not predict the performance of a package in an application-specific environment.

(3)

In accordance with the Low-K thermal metric definitions of EIA/JESD51-3.

(4)

In accordance with the High-K thermal metric definitions of EIA/JESD51-7.

Definitions

Circuit

9