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GLT44108-35P Datasheet(PDF) 7 Page - List of Unclassifed Manufacturers

Part # GLT44108-35P
Description  512K X 8 CMOS DYNAMIC RAM WITH FAST PAGE MODE
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Manufacturer  ETC1 [List of Unclassifed Manufacturers]
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G -LINK
GLT44108
512K X 8 CMOS DYNAMIC RAM WITH FAST PAGE MODE
Preliminary Aug 1999 (Rev.2.1)
G-Link Technology
2701 Northwestern Parkway
Santa Clara, CA 95051, U.S.A.
G-Link Technology Corporation,Taiwan
6F, No.24-2, Industry E. RD. IV, Science Based
Industrial Park, Hsin Chu, Taiwan.
- 7 -
Notes
1. An initial pause of 200
µs is required after power-up followed by any 8 RAS only Refresh or CAS
before RAS Refresh cycles to initialize the internal circuit.
2. VIH(min.) and VIL(min.) are reference levels for measuring timing of input signals. Transition times
are measured between VIH(min.) and VIL(max.) are assumed to be 5ns for all inputs.
3. Measured with an equivalent to 1 TTL loads and 50pF.
4. For read cycles, the access time is defined as follows:
Input Conditions
Access Time
tRAD
≤ t
RAD(MAX.) and tRCD
≤ t
RCD(MAX.)
tRAC(MAX.)
tRAD(max.)< tRAD and tRCD
≤ t
RCD(MAX.)
tAA(MAX.)
tRCD(max.)< tRCD
tCACMAX.)
tRAD(MAX.) and tRCD(MAX.) indicate the points which the access time changes and are not the limits of
operation.
5. tWCS,tRWD,tCWD and tAWD are non restrictive operating parameters. They are included in the data sheet
as electric characteristics only. If tWCS
≥ t
WCS(min.), the cycle is an early write cycle and the data output
will remain high impedance for the duration of the cycle.If tCWD
≥ t
CWD(min.),tRWD
≥ t
RWD (min.) and
tAWD
≥ t
AWD(min.), then the cycle is a read-modify-write cycle and the data output will contain the data
read from the selected address. If neither of the above conditions is satisfied, the condition of the
data
out is indeterminate.
6. tAR,tWCR, and tDHR are referenced to tRAD(max.).
7. tOFF(max.) and tOEZ(max.) define the time at which the output achieves the open circuit condition and are
not referenced to VOH or VOL.
8. tCRP(min) requirement should be applicable for RAS , CAS cycle preceded by any cycles.
9. Either tRCH(min.) or tRRH(min.) must be satisfied for a read cycle.
10. tWP(min.) is applicable for late write cycle or read modify write cycle. In early write cycles,tWCH(min.)
should be satisfied.
11.This specification is referenced to CAS falling edge in early write cycles and to WE falling edge in
late write or read modify write cycles.


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