MITSUMI

No-adjustment Sync Separator MM1068

Application Circuits

There is a momentary phase lag in the H. SYNC output vertical feedback interval. When using this IC for OSD

timing, characters at the top of the screen may bend due to IC deviation. If this happens, change the

resistance between Pins 13 and 14 as shown, and the bending will improve by several H from the top edge of

the screen.

Application Circuit 1

Application Circuit 2

Note 1 : 1.

NTSC

PAL

X

CSB503F2

CSB500F40

R1

1.5k

Ω

1.8k

Ω

R2

390

Ω

C1

220pF

C2

3300pF

Note 2 :

1V for application circuit 1 Pin 7

external circuit.

2. The above 1. does not apply for

application circuit 2 Pin 7 external circuit.

Pin 1 is clamped at approximately 2.5V.

2. Resistors R1 and R2 should have precision of ±1%.

3. Capacitors C1 and C2 should have precision of

±5% and temperature characteristic of CH class.