G -LINK
GLT44108
512K X 8 CMOS DYNAMIC RAM WITH FAST PAGE MODE
Preliminary Aug 1999 (Rev.2.1)
G-Link Technology
2701 Northwestern Parkway
Santa Clara, CA 95051, U.S.A.
G-Link Technology Corporation,Taiwan
6F, No.24-2, Industry E. RD. IV, Science Based
Industrial Park, Hsin Chu, Taiwan.
- 4 -
DC and Operating Characteristics (1-2)
TA = 0
°C to 70°C, VCC=5V±10%, VSS=0V, unless otherwise specified.
Sym.
Parameter
Test Conditions
Access
Time
Min.
Typ
Max. Unit Notes
ILI
Input Leakage Current
(any input pin)
0V
≤ V
IN
≤ 5.5V
(All other pins not under
test=0V)
-10
+10
µA
ILO
Output Leakage Current
(for High-Z State)
0V
≤ V
out
≤ 5.5V
Output is disabled (Hiz)
-10
+10
µA
ICC1
Operating Current,
Random READ/WRITE
tRC = tRC (min.)
tRAC = 40ns
tRAC = 50ns
tRAC = 60ns
150
140
120
mA
1,2
ICC2
Standby Current,(TTL)
RAS , CAS , at VIH
other inputs
≥ V
SS
2
mA
ICC3
Refresh Current,
RAS -Only
RAS cycling,
CAS at VIH
tRC = tRC (min.)
tRAC = 40ns
tRAC = 50ns
tRAC = 60ns
150
140
120
mA
2
ICC4
Operating Current,
FAST Page Mode
RAS at VIL,
CAS ,address
cycling:tPC=tPC(min.)
tRAC = 40ns
tRAC = 50ns
tRAC = 60ns
150
140
120
mA
1,2
ICC5
Refresh Current,
CAS Before RAS
RAS , CAS ,
address cycling:
tRC=tRC(min.)
tRAC = 40ns
tRAC = 50ns
tRAC = 60ns
150
140
120
mA
1
ICC6
Standby Current, (CMOS)
RAS
≥ V
CC-0.2V,
CAS
≥ V
CC-0.2V,
All other inputs
≥V
SS
1
mA
VIL
Input Low Voltage
-1
+0.8
V
3
VIH
Input High Voltage
2.4
VCC+1
V
3
VOL
Output Low Voltage
IOL = 4.2mA
0.4
V
VOH
Output High Voltage
IOH = -5mA
2.4
V
Notes:
1.ICC is dependent on output loading when the device output is selected. Specified ICC(max.) is measured with the output
open.
2.ICC is dependent upon the number of address transitions specified. ICC(max.) is measured with a maximum of one transition
per address cycle in random Read/Write and Fast Page Mode.
3. Specified VIL(min.) is steady state operation. During transitions, VIL(min.) may undershoot to -1.0V for a period
not to exceed 20ns.All AC parameters are measured with VIL(min.)
≥Vss and VIH(max.)≤Vcc.
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