HSP45116883 datasheet(3/6 Pages) INTERSIL

Part #	HSP45116883

Description	Numerically Controlled Oscillator/Modulator

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Manufacturer	INTERSIL [Intersil Corporation]

Direct Link	http://www.intersil.com/cda/home

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TABLE 2. ELECTRICAL PERFORMANCE SPECIFICATIONS

Device Guaranteed and 100% Tested

PARAMETER

SYMBOL

NOTES

GROUP A

SUBGROUPS

TEMPERATURE

(oC)

-15 (15MHz)

-25 (25.6MHz)

UNITS

MIN

MAX

MIN

MAX

CLK Period

tCP

9, 10, 11

-55

≤ TA ≤ 125

66

-

39

-

ns

CLK High

tCH

9, 10, 11

-55

≤ TA ≤ 125

26

-

15

-

ns

CLK Low

tCL

9, 10, 11

-55

≤ TA ≤ 125

26

-

-15

-

ns

WR Low

tWL

9, 10, 11

-55

≤ TA ≤ 125

26

-

15

-

ns

WR High

tWH

9, 10, 11

-55

≤ TA ≤ 125

26

-

15

-

ns

Setup Time; ADO-1,

CS to WR Going High

tAWS

9, 10, 11

-55

≤ TA ≤ 125

20

-

18

-

ns

Hold Time; AD0, AD1,

CS from WR Going High

tAWH

9, 10, 11

-55

≤ TA ≤ 125

0

-

0

-

ns

Setup Time CO-15 from WR Go-

ing High

tCWS

9, 10, 11

-55

≤ TA ≤ 125

20

-

18

-

ns

Hold Time CO-15 from WR Go-

ing High

tCWA

9, 10, 11

-55

≤ TA ≤ 125

0

-

0

-

ns

Setup Time WR to CLK High

tWC

(Note 7)

9, 10, 11

-55

≤ TA ≤ 125

20

-

16

-

ns

Setup Time MODO-1 to CLK

Going High

tMCS

9, 10, 11

-55

≤ TA ≤ 125

20

-

18

-

ns

Hold Time MODO-1 from CLK

Going High

tMCH

9, 10, 11

-55

≤ TA ≤ 125

0

-

0

-

ns

Setup Time PACI to CLK

Going High

tPCS

9, 10, 11

-55

≤ TA ≤ 125

25

-

18

-

ns

Hold Time PACI from CLK

Going High

tPCH

9, 10, 11

-55

≤ TA ≤ 125

0

-

0

-

ns

Setup Time ENPHREG,

ENCFRCTL, ENPHAC,

ENTICTL, CLROFR, PMSEL,

LOAD, ENI, ACC, BINFMT,

PEAK, MODPI/2PI, SHO-1,

RBYTILD from CLK Going High

tECS

9, 10, 11

-55

≤ TA ≤ 125

20

-

15

-

ns

Hold Time ENPHREG,

ENCFRCTL, ENPHAC,

ENTICTL, CLROFR, PMSEL,

LOAD, ENI, ACC, BINFMT,

PEAK, MODPI/2PI, SHO-1,

RBYTILD from CLK Going High

tECH

9, 10, 11

-55

≤ TA ≤ 125

0

-

0

-

ns

Setup Time RINO-18,

IMINO-18 to CLK Going High

tDS

9, 10, 11

-55

≤ TA ≤ 125

20

-

15

-

ns

Hold Time RINO-18,

IMINO-18, to CLK Going High

tDH

9, 10, 11

-55

≤ TA ≤ 125

0

-

0

-

ns

CLK to Output Delay R0O-19,

I0O-19

tDO

9, 10, 11

-55

≤ TA ≤ 125

40

-

25

-

ns

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