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HIP4084 Datasheet(PDF) 2 Page - Intersil Corporation |
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HIP4084 Datasheet(HTML) 2 Page - Intersil Corporation |
2 / 6 page 2 TRUTH TABLE INPUT OUTPUT ALI, BLI, CLI, DLI AHI, BHI, CHI, DHI UVLO/EN RDEL ALO, BLO, CLO, DLO AHO, BHO, CHO, DHO XX 0 X 0 0 1 X 1 >100mV 1 0 00 1 X 0 1 01 1 X 0 0 1 0 1 <100mV 1 1 NOTE: X signifies that input can be either a “1” or “0”. Pin Descriptions PIN NUMBER SYMBOL DESCRIPTION 2 27 17 14 AHB BHB CHB DHB (xHB) High-side Bootstrap supplies. One external bootstrap diode and one capacitor are required for each. Connect cathode of bootstrap diode and positive side of bootstrap capacitor to each xHB pin. 3 5 10 12 AHI BHI CHI DHI (xHI) High-Side Logic Level Inputs. Logic at these three pins controls the three high-side output drivers, AHO (Pin 1), BHO (Pin 26) and CHO (Pin 18) and DHO (Pin 15). When xHI is low, xHO is high. When xHI is high, xHO is low. Unless the dead time is disabled by connecting RDEL (Pin 8) to ground, the low side input of each phase will override the corresponding high side input on that phase. If RDEL is tied to ground, dead time is disabled and the outputs follow the inputs. Care must be taken to avoid shoot-through in this application. EN (Pin 9) also over- rides the high side inputs. xHI can be driven by signal levels of 0V to 15V (no greater than VDD). An internal 100 µA pull-up to VDD will hold each xHI high if the pins are not driven. 4 6 11 13 ALI BLI CLI DLI (xLI) Low-Side Logic Level Inputs. Logic at these three pins controls the three low-side output drivers ALO (Pin 24), BLO (Pin 23) and CLO (Pin 21) and DLO (Pin 20). If the upper inputs are grounded then the lower inputs controls both xLO and xHO drivers, with the dead time set by the resistor at RDEL (Pin 8). EN (Pin 9) high level input overrides xLI, forcing all outputs low. xLI can be driven by signal levels of 0V to 15V (no greater than VDD). An internal 100 µA pull-up to VDD will hold xLI high if these pins are not driven. 7VSS Ground. Connect the sources of the low-side power MOSFETs to this pin. 8RDEL Dead Time Setting. Connect resistor from this pin to VDD to set timing current that defines the dead time be- tween drivers. All drivers turn-off with no adjustable delay, so the RDEL resistor guarantees no shoot-through by delaying the turn-on of all drivers. When RDEL is tied to VSS, both upper and lowers can be commanded on simultaneously. While not necessary in most applications, a decoupling capacitor of 0.1 µF or smaller may be connected between RDEL and VSS. 9 RUV/EN A resistor can be connected between this pin and VSS to program the under voltage set point. With this pin not connected the undervoltage setpoint is typically 6.6V. When this pin is tied to VDD, the undervoltage setpoint is typically 6.2V. With this pin tied to VSS, all six outputs are taken low, overriding all other inputs. 1 26 18 15 AHO BHO CHO DHO (xHO) High-Side Outputs. Connect the gates of the high-side power MOSFETs to these pins. 28 25 19 16 AHS BHS CHS DHS (xHS) High-Side Source connection. Connect the sources of the high-side power MOSFETs to these pins. The nega- tive side of the bootstrap capacitors should also be connected to these pins. 22 VDD Positive supply. De-couple this pin to VSS (Pin 7). 24 23 21 20 ALO BLO CLO DLO (xLO) Low-Side Outputs. Connect the gates of the low-side power MOSFETs to these pins. NOTE: x = A, B, C and D HIP4084 |
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