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74LVX373 Datasheet(PDF) 1 Page - ON Semiconductor |
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74LVX373 Datasheet(HTML) 1 Page - ON Semiconductor |
1 / 8 page © Semiconductor Components Industries, LLC, 2005 March, 2005 − Rev. 2 1 Publication Order Number: MC74LVX373/D MC74LVX373 Octal D−Type Latch with 3−State Outputs With 5V−Tolerant Inputs The MC74LVX373 is an advanced high speed CMOS octal latch with 3−state outputs. The inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V systems to 3.0 V systems. This 8−bit D−type latch is controlled by a latch enable input and an output enable input. When the output enable input is high, the eight outputs are in a high impedance state. Features • High Speed: t PD = 5.8 ns (Typ) at VCC = 3.3 V • Low Power Dissipation: I CC = 4 mA (Max) at TA = 25°C • Power Down Protection Provided on Inputs • Balanced Propagation Delays • Low Noise: V OLP = 0.8 V (Max) • Pin and Function Compatible with Other Standard Logic Families • Latchup Performance Exceeds 300 mA • ESD Performance: Human Body Model > 2000 V; Machine Model > 200 V • Pb−Free Packages are Available* Figure 1. 20−Lead Pinout (Top View) 19 20 18 17 16 15 14 2 1 34567 VCC 13 8 12 9 11 10 O7 D7 D6 O6 O5 D5 D4 O4 LE OE O0 D0 D1 O1 O2 D2 D3 O3 GND *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 20 1 1 20 MARKING DIAGRAMS A = Assembly Location L, WL = Wafer Lot Y, YY = Year W, WW = Work Week SOIC−20 DW SUFFIX CASE 751D LVX373 AWLYYWW LVX 373 ALYW TSSOP−20 DT SUFFIX CASE 948E SOEIAJ−20 M SUFFIX CASE 967 74LVX373 AWLYWW 1 1 1 20 1 20 20 20 See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. ORDERING INFORMATION PIN NAMES Function Output Enable Input Latch Enable Input Data Inputs 3−State Latch Outputs Pins OE LE D0−D7 O0−O7 |
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