PCA9510A_1

© Koninklijke Philips Electronics N.V. 2005. All rights reserved.

Product data sheet

Rev. 01 — 8 September 2005

5 of 23

Philips Semiconductors

PCA9510A

is activated during the initialization and is deactivated when the connection is made. The

precharge circuitry pulls up the SDAIN and SCLIN input pins to 1 V through individual

100 k

Ω nominal resistors. This precharges the pins to 1 V to minimize the worst case

disturbances that result from inserting a card into the backplane where the backplane and

the card are at opposite logic levels.

8.2 Connect circuitry

Once the connection circuitry is activated, the behavior of SDAIN and SDAOUT as well as

SCLIN and SCLOUT become identical with each acting as a bidirectional buffer that

isolates the input capacitance from the output bus capacitance while communicating the

logic levels. A LOW forced on either SDAIN or SDAOUT will cause the other pin to be

driven to a LOW by the part. The same is also true for the SCLn pins. Noise between

one pin, the other pin in the pair turns on a pull-down driver that is referenced to a small

voltage above the falling pin. The driver will pull the pin down at a slew rate determined by

the driver and the load initially, because it does not start until the first falling pin is below

pull-down slew rate then the initial pull-down rate will continue. If the first falling pin has a

slow slew rate then the second pin will be pulled down at its initial slew rate only until it is

just above the first pin voltage then they will both continue down at the slew rate of the

first.

Once both sides are LOW they will remain LOW until all the external drivers have stopped

driving LOWs. If both sides are being driven LOW to the same value for instance, 10 mV

by external drivers, which is the case for clock stretching and is typically the case for

acknowledge, and one side external driver stops driving that pin will rise until the internal

driver pulls it down to the offset voltage. When the last external driver stops driving a

LOW, that pin will rise up and settle out just above the other pin as both rise together with

a slew rate determined by the internal slew rate control and the RC time constant. As long

as the slew rate is at least 1.25 V/

µs, when the pin voltage exceeds 0.6 V for the

PCA9510A, the pull-down driver is turned off.

8.3 Maximum number of devices in series

Each buffer adds about 0.1 V dynamic level offset at 25

°C with the offset larger at higher

level at the signal origination end (master) is dependent upon the load and the only

after four buffers would be 0.5 V, which is only about 0.1 V below the threshold of the

rising edge accelerator (about 0.6 V). With great care a system with four buffers may

the rising edge accelerator thus introducing false clock edges. Generally it is

recommended to limit the number of buffers in series to two, and to keep the load light to

minimize the offset.

The PCA9510A (rise time accelerator is permanently disabled) and the PCA9512A (rise

time accelerator can be turned off) are a little different with the rise time accelerator turned

off because the rise time accelerator will not pull the node up, but the same logic that turns