MC74HC4046A

http://onsemi.com

2

Pin No.

Symbol

Name and Function

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

PCPOUT

PC1OUT

COMPIN

VCOOUT

INH

C1A

C1B

GND

VCOIN

DEMOUT

R1

R2

PC2OUT

SIGIN

PC3OUT

VCC

Phase Comparator Pulse Output

Phase Comparator 1 Output

Comparator Input

VCO Output

Inhibit Input

Capacitor C1 Connection A

Capacitor C1 Connection B

Ground (0 V) VSS

VCO Input

Demodulator Output

Resistor R1 Connection

Resistor R2 Connection

Phase Comparator 2 Output

Signal Input

Phase Comparator 3 Output

Positive Supply Voltage

MAXIMUM RATINGS*

Symbol

Parameter

Value

Unit

VCC

DC Supply Voltage (Referenced to GND)

– 0.5 to + 7.0

V

Vin

DC Input Voltage (Referenced to GND)

– 1.5 to VCC + 1.5

V

Vout

DC Output Voltage (Referenced to GND)

– 0.5 to VCC + 0.5

V

Iin

DC Input Current, per Pin

± 20

mA

Iout

DC Output Current, per Pin

± 25

mA

ICC

DC Supply Current, VCC and GND Pins

± 50

mA

PD

Power Dissipation in Still Air

Plastic DIP†

SOIC Package†

750

500

mW

Tstg

Storage Temperature

– 65 to + 150

_C

TL

Lead Temperature, 1 mm from Case for 10 Seconds

Plastic DIP and SOIC Package†

260

_C

*Maximum Ratings are those values beyond which damage to the device may occur.

Functional operation should be restricted to the Recommended Operating Conditions.

†Derating — Plastic DIP: – 10 mW/

_C from 65_ to 125_C

SOIC Package: – 7 mW/

_C from 65_ to 125_C

For high frequency or heavy load considerations, see Chapter 2 of the ON Semiconductor High–Speed CMOS Data Book (DL129/D).

RECOMMENDED OPERATING CONDITIONS

Symbol

Parameter

Min

Max

Unit

VCC

DC Supply Voltage (Referenced to GND)

3.0

6.0

V

VCC

DC Supply Voltage (Referenced to GND) NON–VCO

2.0

6.0

V

Vin, Vout

DC Input Voltage, Output Voltage (Referenced to GND)

0

VCC

V

TA

Operating Temperature, All Package Types

– 55

+ 125

_C

tr, tf

Input Rise and Fall Time

VCC = 2.0 V

(Pin 5)

VCC = 4.5 V

VCC = 6.0 V

0

0

0

1000

500

400

ns

This device contains protection

circuitry to guard against damage

due to high static voltages or electric

fields. However, precautions must

be taken to avoid applications of any

voltage higher than maximum rated

voltages to this high–impedance cir-

cuit. For proper operation, Vin and

Vout should be constrained to the

range GND

v (Vin or Vout) v VCC.

Unused inputs must always be

tied to an appropriate logic voltage

level (e.g., either GND or VCC).

Unused outputs must be left open.

PIN ASSIGNMENT

13

14

15

16

9

10

11

12

5

4

3

2

1

8

7

6

R2

PC2out

SIGin

PC3out

VCC

VCOin

DEMout

R1

VCOout

COMPin

PC1out

PCPout

GND

C1B

C1A

INH