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AP8842 Datasheet(PDF) 8 Page - Aplus Intergrated Circuits |
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AP8842 Datasheet(HTML) 8 Page - Aplus Intergrated Circuits |
8 / 14 page Integrated Circuits Inc. aP8842 Ver 1.3 8 AC Characteristics 1. INPUT SETUP AND HOLD TIME : KEY Trigger Mode : S1 to S8 hold time, th (min.) = 22ms @ 6K Hz sampling CPU Trigger Mode : SBT setup time ts (min.) = 1us, and S1 to S5 hold time th (min.) = 22ms @ 6K Hz sampling Note: Input hold time th is inverse proportional to the sampling frequency. 2. OUTPUTS DELAY TIME : STOP : Delay time td (max.) = 1us, plus width tw (min.) = 64ms @ 6K Hz sampling Note: The pulse width tw is inverse proportional to the sampling frequency. BUSY : Delay time td (max.) = 1us, hold time th (max.) = 1us @ 6K Hz sampling Note: The BUSY delay time td and hold time th is fixed and independent of sampling frequency. LED flash at fixed 2Hz @ 6K Hz sampling |
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