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CY28404OXCT Datasheet(PDF) 10 Page - Cypress Semiconductor

Part # CY28404OXCT
Description  CK409-COMPLIANT CLOCK SYNTHESIZER
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY28404OXCT Datasheet(HTML) 10 Page - Cypress Semiconductor

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CY28404
Document #: 38-07510 Rev. *B
Page 10 of 20
Dial-A-Frequency Programming
When the programmable output frequency feature is enabled
(Pro_Freq_EN bit is set), the CPU output frequency is deter-
mined by the following equation:
Fcpu = G * N/M.
“N” and “M” are the values programmed in Programmable
Frequency Select N-Value Register and M-Value Register,
respectively.
“G” stands for the PLL Gear Constant, which is determined by
the programmed value of FS[E:A] or SEL[4:0]. The value is
listed in Table 2.
The ratio of N and M needs to be greater than “1” [N/M> 1].
Table 6 lists set of N and M values for different frequency
output ranges.This example use a fixed value for the M-Value
Register and select the CPU output frequency by changing the
value of the N-Value Register.
Crystal Recommendations
The CY28404 requires a Parallel Resonance Crystal.
Substituting a series resonance crystal will cause the
CY28404 to operate at the wrong frequency and violate the
ppm specification. For most applications there is a 300-ppm
frequency shift between series and parallel crystals due to
incorrect loading.
Crystal Loading
Crystal loading plays a critical role in achieving low ppm perfor-
mance. To realize low ppm performance, the total capacitance
the crystal will see must be considered to calculate the appro-
priate capacitive loading (CL).
Figure 1 shows a typical crystal configuration using the two
trim capacitors. An important clarification for the following
discussion is that the trim capacitors are in series with the
crystal not parallel. It’s a common misconception that load
capacitors are in parallel with the crystal and should be
approximately equal to the load capacitance of the crystal.
This is not true.
4
0
Reserved
Reserved, set = 0
3
0
Reserved
Reserved, set = 0
2
0
Reserved
Reserved, set = 0
1
0
Reserved
Reserved, set = 0
0
0
Pro_Freq_EN
Programmable output frequencies enabled
0 = disabled, 1 = enabled
Byte 14: Control Register 14 (continued)
Bit
@Pup
Name
Description
Table 6. Examples of N and M Value for Different CPU
Frequency Range
Frequency
Ranges
Gear
Constants
Fixed Value
for M-Value
Register
Range of N-Value
Register for
Different CPU
Frequency
100—125 24004009.32
48
200–250
126—166 32005345.76
48
189–249
167—200 48008018.65
48
167–200
Table 7. Crystal Recommendations
Frequency
(Fund)
Cut
Loading Load Cap
Drive
(max.)
Shunt Cap
(max.)
Motional
(max.)
Tolerance
(max.)
Stability
(max.)
Aging
(max.)
14.31818 MHz
AT
Parallel
20 pF
0.1 mW
5 pF
0.016 pF
50 ppm
50 ppm
5 ppm
Figure 1. Crystal Capacitive Clarification


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