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CY28404 Datasheet(PDF) 3 Page - Cypress Semiconductor

Part # CY28404
Description  CK409-COMPLIANT CLOCK SYNTHESIZER
Download  20 Pages
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY28404 Datasheet(HTML) 3 Page - Cypress Semiconductor

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CY28404
Document #: 38-07510 Rev. *B
Page 3 of 20
MODE Select
The hardware strapping MODE input pin can be used to select
the functionality of the RESET#/PD# pin. The default (internal
pull-up) configuration is for this pin to function as a RESET#
Watchdog output. When pulled LOW during device Power-up,
the RESET#/PD# pin will be configured to function as a
Power-down input pin.
Frequency Select Pins
Host clock frequency selection is achieved by applying the
appropriate logic levels to FS_A through FS_E inputs prior to
VTT_PWRGD# assertion (as seen by the clock synthesizer).
Upon VTT_PWRGD# being sampled LOW by the clock chip
(indicating processor VTT voltage is stable), the clock chip
samples the FS_A through FS_E input values. For all logic
levels of FS_A through FS_E VTT_PWRGD# employs a
one-shot functionality in that once a valid LOW on
VTT_PWRGD# has been sampled, all further VTT_PWRGD#
and FS_A through FS_E transitions will be ignored.
Table 2. Frequency Selection Table
Input Conditions
Output Frequency
VCO Freq.
PLL Gear
Constants
(G)
FS_E
FS_D
FS_C
FS_B
FS_A
CPU
3V66
PCI
FSEL_4 FSEL_3 FSEL_2
FSEL_1
FSEL_0
0
0
0
0
0
100.7
67.1
33.6
805.6
24004009.32
0
0
0
0
1
100.2
66.8
33.4
801.6
24004009.32
0
0
0
1
0
108.0
72.0
36.0
864.0
24004009.32
0
0
0
1
1
101.2
67.5
33.7
809.6
24004009.32
0
0
1
0
0
Reserved
Reserved
Reserved
Reserved
Reserved
0
0
1
0
1
Reserved
Reserved
Reserved
Reserved
Reserved
0
0
1
1
0
Reserved
Reserved
Reserved
Reserved
Reserved
0
0
1
1
1
Reserved
Reserved
Reserved
Reserved
Reserved
0
1
0
0
0
125.7
62.9
31.4
754.2
32005345.76
0
1
0
0
1
130.3
65.1
32.6
781.6
32005345.76
0
1
0
1
0
133.6
66.8
33.4
801.6
32005345.76
0
1
0
1
1
134.2
67.1
33.6
805.2
32005345.76
0
1
1
0
0
134.5
67.3
33.6
807.0
32005345.76
0
1
1
0
1
148.0
74.0
37.0
888.0
32005345.76
0
1
1
1
0
Reserved
Reserved
Reserved
Reserved
Reserved
0
1
1
1
1
Reserved
Reserved
Reserved
Reserved
Reserved
1
0
0
0
0
Reserved
Reserved
Reserved
Reserved
Reserved
1
0
0
0
1
Reserved
Reserved
Reserved
Reserved
Reserved
1
0
0
1
0
167.4
55.8
27.9
669.6
48008018.65
1
0
0
1
1
170.0
56.7
28.3
680.0
48008018.65
1
0
1
0
0
175.0
58.3
29.2
700.0
48008018.65
1
0
1
0
1
180.0
60.0
30.0
720.0
48008018.65
1
0
1
1
0
185.0
61.7
30.8
740.0
48008018.65
1
0
1
1
1
190.0
63.3
31.7
760.0
48008018.65
1
1
0
0
0
100.9
67.3
33.6
807.2
24004009.32
1
1
0
0
1
133.9
67.0
33.5
803.4
32005345.76
1
1
0
1
0
200.9
67.0
33.5
803.6
48008018.65
1
1
0
1
1
Reserved
Reserved
Reserved
Reserved
Reserved
1
1
1
0
0
100.0
66.7
33.3
800.0
24004009.32
1
1
1
0
1
133.3
66.7
33.3
800.0
32005345.76
1
1
1
1
0
200.0
66.7
33.3
800.0
48008018.65
1
1
1
1
1
Reserved
Reserved
Reserved
Reserved
Reserved


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