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LPC47B37X Datasheet(PDF) 3 Page - SMSC Corporation

Part No. LPC47B37X
Description  100 Pin Enhanced Super I/O for LPC Bus with SMBus Controller for Commercial Applications
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Maker  SMSC [SMSC Corporation]
Homepage  http://www.smsc.com
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 3 page
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TABLE OF CONTENTS
FEATURES ....................................................................................................................................... 1
GENERAL DESCRIPTION ................................................................................................................ 2
PIN CONFIGURATION ...................................................................................................................... 5
DESCRIPTION OF PIN FUNCTIONS ................................................................................................. 6
Buffer Type Descriptions............................................................................................................... 10
Pins That Require External Pullup Resistors.................................................................................. 11
3.3 VOLT OPERATION / 5 VOLT TOLERANCE .............................................................................. 12
POWER FUNCTIONALITY .............................................................................................................. 12
VCC Power .................................................................................................................................. 12
VTR Support ................................................................................................................................ 12
Internal PWRGOOD ..................................................................................................................... 12
32.768 kHz Trickle Clock Input...................................................................................................... 12
Indication of 32kHz Clock ............................................................................................................. 13
Trickle Power Functionality ........................................................................................................... 13
Maximum Current Values.............................................................................................................. 15
Power Management Events (PME/SCI)......................................................................................... 15
FUNCTIONAL DESCRIPTION ......................................................................................................... 16
Super I/O Registers ...................................................................................................................... 16
Host Processor Interface (LPC)..................................................................................................... 16
FLOPPY DISK CONTROLLER ........................................................................................................ 21
FDC Internal Registers ................................................................................................................. 21
Command Set/Descriptions .......................................................................................................... 39
Instruction Set .............................................................................................................................. 43
SERIAL PORT (UART).................................................................................................................... 71
INFRARED INTERFACE ................................................................................................................. 87
PARALLEL PORT........................................................................................................................... 89
POWER MANAGEMENT................................................................................................................114
SERIAL IRQ...................................................................................................................................118
ISA IRQ To Serial IRQ Conversion Capability...............................................................................122
8042 KEYBOARD CONTROLLER DESCRIPTION .........................................................................123
Keyboard Interface ......................................................................................................................123
External Keyboard and Mouse Interface .......................................................................................125
Keyboard Power Management .....................................................................................................125
Interrupts.....................................................................................................................................126
Memory Configurations................................................................................................................126
Register Definitions .....................................................................................................................126
External Clock Signal...................................................................................................................127
Default Reset Conditions .............................................................................................................127
Latches On Keyboard and Mouse IRQs .......................................................................................130
Keyboard and Mouse PME Generation ........................................................................................132
GENERAL PURPOSE I/O...............................................................................................................133
GPIO Pins...................................................................................................................................133
Description..................................................................................................................................134
GPIO Control ..............................................................................................................................136
GPIO Operation ..........................................................................................................................137
GPIO PME and SMI Functionality ................................................................................................138
Either Edge Triggered Interrupts ..................................................................................................140




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