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FAN6520AIM Datasheet(PDF) 7 Page - Fairchild Semiconductor |
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FAN6520AIM Datasheet(HTML) 7 Page - Fairchild Semiconductor |
7 / 15 page PRODUCT SPECIFICATION FAN6520A REV. 1.0.2 8/26/04 7 Figure 4. Soft-Start Interval The FAN6520A incorporates a MOSFET shoot-through protection method which allows a converter to both sink and source current. Care should be exercised when designing a converter with the FAN6520A when it is known that the converter may sink current. When the converter is sinking current, it is behaving as a boost converter that is regulating its input voltage. This means that the converter is boosting current into the VCC rail, which supplies the bias voltage to the FAN6520A. If this current has nowhere to go—such as to other distrib- uted loads on the VCC rail, through a voltage limiting pro- tection device, or other methods—the capacitance on the VCC bus will absorb the current. This situation will allow the voltage level of the VCC rail to increase. If the voltage level of the rail is boosted to a level that exceeds the maxi- mum voltage rating of the FAN6520A, then the IC will expe- rience an irreversible failure and the converter will no longer be operational. Ensure that there is a path for the current to follow other than the capacitance on the rail to prevent this failure mode. Application Guidelines Layout Considerations As in any high frequency switching converter, layout is very important. Switching current from one power device to another can generate voltage transients across the imped- ances of the interconnecting bond wires and circuit traces. Use wide, short-printed circuit traces to minimize these interconnecting impedances. The critical components should be located as close together as possible, using ground plane construction or single point grounding. Figure 5. Printed Circuit Board Power and Ground Planes or Islands Figure 5 shows the critical power components of the con- verter. To minimize the voltage overshoot, the interconnect- ing wires indicated by heavy lines should be part of a ground or power plane in a printed circuit board. The components shown in Figure 5 should be located as close together as possible. Please note that the capacitors CIN and COUT may each represent numerous physical capacitors. Locate the FAN6520A within two inches of the Q1 and Q2 MOSFETs. The circuit traces for the MOSFETs’ gate and source con- nections from the FAN6520A must be sized to handle up to 1A peak current. Figure 5 shows the circuit traces that require additional layout consideration. Use single point and ground plane construction for the circuits shown. Minimize any leakage current paths on the COMP/OCSET pin and locate the resistor, ROSCET close to the COMP/OCSET pin because the internal current source is only 20µA. Provide local VCC decoupling between VCC and GND pins. Locate the capaci- tor, CBOOT as close as practical to the BOOT and PHASE pins. All components used for feedback compensation should be located as close to the IC as practical. Figure 6. PC Board Small Signal Layout Guidelines +VOUT Q2 LDRV SW HDRV Q1 CIN LOUT COUT Vin FAN 6520A Q2 VCC SW BOOT Q1 L OUT C OUT GND C BOOT CVCC +5V DBOOT COMP/OCSET +5V Vin |
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