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EL7564CM-T13 Datasheet(PDF) 9 Page - Intersil Corporation |
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EL7564CM-T13 Datasheet(HTML) 9 Page - Intersil Corporation |
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9 / 17 page  9 FN7297.3 May 9, 2005 Block Diagram FIGURE 21. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE FIGURE 22. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE Typical Performance Curves (Continued) JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD. HTSSOP EXPOSED DIEPAD SOLDERED TO PCB PER JESD51-5 3.5 3 2.5 1.5 1 0.5 0 0 255075 100 150 AMBIENT TEMPERATURE (°C) 3.333W 125 85 2 JEDEC JESD51-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 1 0.9 0.6 0.4 0.3 0.2 0.1 0 0 25 50 75 100 150 AMBIENT TEMPERATURE (°C) 85 0.8 0.5 0.7 125 909mW DRIVERS PWM CONTROLLER POWER TRACKING CURRENT SENSE VOLTAGE REFERENCE OSCILLATOR 2.2nF 0.22µF 22 Ω STP STN CONTROLLER SUPPLY SGND POWER POWER FET FET 390pF 0.1µF 0.22µF 4.7µH VOUT 2370 Ω 1k Ω 330µF VREF COSC VHI VIN PGND VDD VTJ VDRV FB D1 EN - + PG VREF 100pF JUNCTION TEMPERATURE EL7564 |
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