CHRONTEL
CH5101A
201-0000-033 Rev 1.0, 6/2/99
9
•
Horizontal start - In non-CCIR601 modes, the delay between the HS* output and the output of active data
from the CH5101 is programmable via the HS register. The polarity of this output is programmable.
•
Vertical start - In non-CCIR601 modes, the delay between the VS* output and the output of active data from
the CH5101 is programmable via the VS register. The polarity of this output is programmable.
•
Frame rate adjustment method — The CH5101 has two methods for adjusting the frame rate of the device.
The first method is to add additional black lines to each frame after reading out the active data. The second
method is to have each frame remain a constant number of lines long, and have each line contain a variable
number of blank pixels after reading out the active data. In this mode, all clock signals are 1/2 of the normal
rate.
•
Auto shutter speed — The auto-shutter loop speed can be controlled via ASSPD[2:0].
Bus control:
The CH5101 is controlled via a 2 pin serial interface. The description of this interface, and all registers accessible
via the interface is described later in the data sheet.
Power up control:
Seven bits within the CH5101 register map can have their default value determined at the time of power-up, or when
the Reset pin is exercised. This is accomplished by using a high valued pull-down resistor on the PUD[6:0] pins.
These pins are pulled high by an internal high impedance pull-up device. This pull-up can be overridden by con-
necting a 100K ohm resistor externally to ground. After three frames, the level at the PUD[6:0] pins is latched, and
seven register bits are set or cleared depending upon the corresponding pin's level. The PUD[6:0] pins functions are
then returned to outputs of the chroma data. The power-up control affects the following register bits:
Table 2. Power Up Default Control
Pin
Register
Bit
Function
PUD[5]*
22h
3
ADDO
The A/D Direct Output mode can be selected at power up. This bypasses the 2-
D LPF and Gamma correction, which may be desirable for applications which
want to use raw data. Logically inverted input
No pull-down resistor - Datapath processing
Pull-down resistor - A/D direct output
PUD[4]*
19h
4
PD
The power down bit can be enabled at power up. This may be desirable in USB
cameras which have power limitations at power up. Logically inverted input
No pull-down resistor - Normal power-up
Pull-down resistor - Power-up in low-power mode
PUD[6]
00h
1
M0
The Mode[0] bit can be used to select between NTSC or PAL output at power up.
No pull-down resistor - PAL operation
Pull-down resistor - NTSC operation
PUD[3:0]*
1Eh
3:0
ASW[3:0]
The auto-shutter window can be selected at power up. See the register
description for corresponding window selection. Logically inverted inputs
No pull-down resistors gives window "0", Center location
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