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EL5412IR-T7 Datasheet(PDF) 8 Page - Intersil Corporation |
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EL5412IR-T7 Datasheet(HTML) 8 Page - Intersil Corporation |
8 / 8 page 8 All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN7394.1 December 22, 2004 Where: • i = Channel 1 to 4 •VS = Total supply voltage •ISMAX = Maximum supply current per amplifier •VOUTi = Maximum output voltage of the application •ILOADi = Load current If we set the two PDMAX equations equal to each other, we can solve for RLOADi to avoid device overheat. Figure 10 and Figure 11 provide a convenient way to see if the device will overheat. The maximum safe power dissipation can be found graphically, based on the package type and the ambient temperature. By using the previous equation, it is a simple matter to see if PDMAX exceeds the device's power derating curves. To ensure proper operation, it is important to observe the recommended derating curves shown in Figures 10 and 11. FIGURE 10. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE FIGURE 11. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE Unused Amplifiers It is recommended that any unused amplifiers be configured as a unity gain follower. The inverting input should be directly connected to the output and the non-inverting input tied to the ground plane. Power Supply Bypassing and Printed Circuit Board Layout The EL5412 can provide gain at high frequency. As with any high-frequency device, good printed circuit board layout is necessary for optimum performance. Ground plane construction is highly recommended, lead lengths should be as short as possible and the power supply pins must be well bypassed to reduce the risk of oscillation. For normal single supply operation, where the VS- pin is connected to ground, a 0.1µF ceramic capacitor should be placed from VS+ to pin to VS- pin. A 4.7µF tantalum capacitor should then be connected in parallel, placed in the region of the amplifier. One 4.7µF capacitor may be used for multiple devices. This same capacitor combination should be placed at each supply pin to ground if split supplies are to be used. JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD - HTSSOP EXPOSED DIEPAD SOLDERED TO PCB PER JESD51-5 3.5 3 2.5 1.5 1 0.5 0 0 255075 100 150 AMBIENT TEMPERATURE (°C) 125 85 2 2.632W θ JA = 38° C/W HT SS OP 14 100 MAX TJ=125°C θJA=1 00°C/W 1.0W TSSOP 14 400 800 0 1200 1000 600 200 PACKAGE MOUNTED ON A JEDEC JESD51-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 606mW θ JA=16 5°C /W TSS OP1 4 MAX TJ=125°C 50 150 AMBIENT TEMPERATURE (°C) 100 025 75 125 85 694mW θ JA =1 44°C /W HT SS OP 14 EL5412 |
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