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EL5325 Datasheet(PDF) 5 Page - Intersil Corporation |
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EL5325 Datasheet(HTML) 5 Page - Intersil Corporation |
5 / 11 page 5 General Description The EL5325 provides a versatile method of providing the reference voltages that are used in setting the transfer characteristics of LCD display panels. The V/T (Voltage/Transmission) curve of the LCD panel requires that a correction is applied to make it linear; however, if the panel is to be used in more than one application, the final curve may differ for different applications. By using the EL5325, the V/T curve can be changed to optimize its characteristics according to the required application of the display product. Each of the eight reference voltage outputs can be set with a 10-bit resolution. These outputs can be driven to within 50mV of the power rails of the EL5325. As all of the output buffers are identical, it is also possible to use the EL5325 for applications other than LCDs where multiple voltage references are required that can be set to 10 bit accuracy. Digital Interface The EL5325 uses a simple 3-wire SPI compliant digital interface to program the outputs. The EL5325 can support the clock rate up to 5MHz. Serial Interface The EL5325 is programmed through a three-wire serial interface. The start and stop conditions are defined by the ENA signal. While the ENA is low, the data on the SDI (serial data input) pin is shifted into the 16-bit shift register on the positive edge of the SCLK (serial clock) signal. The MSB (bit 15) is loaded first and the LSB (bit 0) is loaded last (see Table 1). After the full 16-bit data has been loaded, the ENA is pulled high and the addressed output channel is updated. The SCLK is disabled internally when the ENA is high. The SCLK must be low before the ENA is pulled low. FIGURE 7. SMALL SIGNAL RESPONSE (RISING FROM 0V TO 200mV) FIGURE 8. SMALL SIGNAL RESPONSE (FALLING FROM 200mV TO 0V) FIGURE 9. POWER DISSIPATION vs AMBIENT TEMPERATURE FIGURE 10. POWER DISSIPATION vs AMBIENT TEMPERATURE Typical Performance Curves (Continued) SDA OUTPUT SCLK M=400µs/DIV 5V 0V 0V 5V 0V 200mV SDA OUTPUT SCLK M=400µs/DIV 833mW JEDEC JESD51-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 0.9 0.8 0.6 0.4 0.3 0.2 0.1 0 0 25 50 75 100 125 AMBIENT TEMPERATURE (°C) 85 0.7 0.5 θ JA = 120 °C /W TS SO P2 8 1.333W JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 1.4 1.2 1 0.8 0.6 0.4 0.2 0 0 25 50 75 100 125 AMBIENT TEMPERATURE (°C) 85 θ JA = 75° C/W TS SO P2 8 EL5325 |
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