1

®

X9401

Low Noise/Low Power/SPI Bus

Quad, 64 Tap, Digitally Controlled

Potentiometer (XDCP™)

FEATURES

• Quad–4 separate pots, 64 taps/pot

• Nonvolatile storage of wiper position

• Four Nonvolatile Data Registers for Each Pot

• 16-bytes of EEPROM memory

• SPI serial interface

• Wiper resistance = 150

Ω typical

• Standby current < 1µA (total package)

• Operating current < 400µA max.

• Packages–24 Ld TSSOP and SOIC

• 100 year data retention

• Pb-free plus anneal available (RoHS compliant)

DESCRIPTION

The X9401 integrates 4 digitally controlled potentiome-

ters (XDCP) on a monolithic CMOS integrated

microcircuit.

The digitally controlled potentiometer is implemented

using 64 resistive elements in a series array. Between

each element are tap points connected to the wiper

terminal through switches. The position of the wiper on

the array is controlled by the user through the SPI bus

interface. Each potentiometer has associated with it a

volatile Wiper Counter Register (WCR) and 4 nonvola-

tile Data Registers (DR0:DR3) that can be directly writ-

ten to and read by the user. The contents of the WCR

controls the position of the wiper on the resistor array

through the switches. Power-up recalls the contents of

DR0 to the WCR.

The XDCP can be used as a three-terminal potentiom-

eter or as a two-terminal variable resistor in a wide

variety of applications including control, parameter

adjustments, and signal processing.

BLOCK DIAGRAM

Interface

and

Control

Circuitry

CS

SCK

SO

A0

A1

R0 R1

R2 R3

Wiper

Counter

Register

(WCR)

Resistor

Array

Pot 1

R0 R1

R2 R3

Wiper

Counter

Register

(WCR)

Data

8

R0 R1

R2 R3

Resistor

Array

R0 R1

R2 R3

Resistor

Array

Wiper

Counter

Register

(WCR)

Wiper

Counter

Register

(WCR)

Pot 3

Pot 2

HOLD

Pot 0

WP

SI

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 1-888-468-3774

XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved

All other trademarks mentioned are the property of their respective owners.

PRELIMINARY

Data Sheet

FN8190.2

September 23, 2005