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X9261TV24 Datasheet(PDF) 6 Page - Intersil Corporation |
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X9261TV24 Datasheet(HTML) 6 Page - Intersil Corporation |
6 / 21 page 6 FN8171.2 September 14, 2005 Figure 1. Detailed Potentiometer Block Diagram DEVICE DESCRIPTION Wiper Counter Register (WCR) The X9261 contains two Wiper Counter Registers, one for each DCP potentiometer. The Wiper Counter Register can be envisioned as a 8-bit parallel and serial load counter with its outputs decoded to select one of 256 switches along its resistor array. The contents of the WCR can be altered in four ways: it may be written directly by the host via the Write Wiper Counter Register instruction (serial load); it may be written indirectly by transferring the contents of one of four associated data registers via the XFR Data Register instruction (parallel load); it can be modified one step at a time by the Increment/Decrement instruction (See Instruction section for more details). Finally, it is loaded with the contents of its Data Register zero (DR0) upon power-up. The Wiper Counter Register is a volatile register; that is, its contents are lost when the X9261 is powered- down. Although the register is automatically loaded with the value in DR0 upon power-up, this may be different from the value present at power-down. Power-up guidelines are recommended to ensure proper loadings of the DR0 value into the WCR. Data Registers (DR) Each potentiometer has four 8-bit nonvolatile Data Registers. These can be read or written directly by the host. Data can also be transferred between any of the four Data Registers and the associated Wiper Counter Register. All operations changing data in one of the Data Registers is a nonvolatile operation and will take a maximum of 10ms. If the application does not require storage of multiple settings for the potentiometer, the Data Registers can be used as regular memory locations for system parameters or user preference data. Bits [7:0] are used to store one of the 256 wiper positions or data (0~255). Status Register (SR) This 1-bit Status Register is used to store the system status. WIP: Write In Progress status bit, read only. – When WIP=1, indicates that high-voltage write cycle is in progress. – When WIP=0, indicates that no high-voltage write cycle is in progress. SERIAL DATA PATH FROM INTERFACE CIRCUITRY REGISTER 0 REGISTER 1 REGISTER 2 REGISTER 3 SERIAL BUS INPUT PARALLEL BUS INPUT COUNTER REGISTER INC/DEC LOGIC UP/DN CLK MODIFIED SCK UP/DN RH RL RW 8 8 C O U N T E R D E C O D E IF WCR = 00[H] THEN RW = RL IF WCR = FF[H] THEN RW = RH WIPER (WCR) One of Two Potentiometers (DR0) (DR1) (DR2) (DR3) X9261 |
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