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X9250US24-2.7 Datasheet(PDF) 7 Page - Intersil Corporation

Part # X9250US24-2.7
Description  Low Noise/Low Power/SPI Bus/256 Taps
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

X9250US24-2.7 Datasheet(HTML) 7 Page - Intersil Corporation

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7
FN8165.1
March 25, 2005
Figure 8. Increment/Decrement Timing Limits
Table 1. Instruction Set
Instruction
Instruction Set
Operation
I3
I2
I1
I0
R1
R0
P1
P0
Read Wiper Counter
Register
1
0010
0
P1
P0
Read the contents of the Wiper Counter
Register pointed to by P1- P0
Write Wiper Counter
Register
1
0100
0
P1
P0
Write new value to the Wiper Counter Register
pointed to by P1- P0
Read Data Register
1
0
1
1
R1
R0
P1
P0
Read the contents of the Data Register
pointed to by P1- P0 and R1- R0
Write Data Register
1
1
0
0
R1
R0
P1
P0
Write new value to the Data Register pointed to
by P1- P0 and R1- R0
XFR Data Register to
Wiper Counter Register
1
101
R1
R0
P1
P0
Transfer the contents of the Data Register
pointed to by R1- R0 to the Wiper Counter
Register pointed to by P1- P0
XFR Wiper Counter
Register to Data Register
1
110
R1
R0
P1
P0
Transfer the contents of the Wiper Counter
Register pointed to by P1- P0 to the Register
pointed to by R1- R0
Global XFR Data Register
to Wiper Counter Register
0
001
R1
R0
0
0
Transfer the contents of the Data Registers
pointed to by R1- R0 of all four pots to their
respective Wiper Counter Register
Global XFR Wiper Counter
Register to Data Register
1
000
R1
R0
0
0
Transfer the contents of all Wiper Counter
Registers to their respective data Registers
pointed to by R1- R0 of all four pots
Increment/Decrement
Wiper Counter Register
0
0100
0
P1
P0
Enable Increment/decrement of the Wiper
Counter Register pointed to by P1- P0
Read Status (WIP bit)
0
1010
0
0
1
Read the status of the internal write cycle, by
checking the WIP bit.
SCK
SI
VW/RW
INC/DEC CMD Issued
tWRID
Voltage Out
X9250


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