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X5648S14-2.7 Datasheet(PDF) 1 Page - Intersil Corporation

Part # X5648S14-2.7
Description  CPU Supervisor with 64Kbit SPI EEPROM
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

X5648S14-2.7 Datasheet(HTML) 1 Page - Intersil Corporation

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1
®
FN8136.0
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-352-6832
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
X5648, X5649
(Replaces X25648, X25649)
CPU Supervisor with 64Kbit SPI EEPROM
FEATURES
•Low VCC detection and reset assertion
—Five standard reset threshold voltages
—Re-program low VCC reset threshold voltage
using special programming sequence
—Reset signal valid to VCC = 1V
• Long battery life with low power consumption
—<50µA max standby current, watchdog on
—<1µA max standby current, watchdog off
—<400µA max active current during read
• 64Kbits of EEPROM
• Built-in inadvertent write protection
—Power-up/power-down protection circuitry
—Protect 0, 1/4, 1/2 or all of EEPROM array with
Block Lockprotection
—In circuit programmable ROM mode
• 2MHz SPI interface modes (0,0 & 1,1)
• Minimize EEPROM programming time
—32-byte page write mode
—Self-timed write cycle
—5ms write cycle time (typical)
• 2.7V to 5.5V and 4.5V to 5.5V power supply
operation
• Available packages
—14-lead SOIC, 8-lead PDIP
DESCRIPTION
These devices combine three popular functions, Power-
on Reset Control, Supply Voltage Supervision, and Block
Lock Protect Serial EEPROM Memory in one package.
This combination lowers system cost, reduces board
space requirements, and increases reliability.
Applying power to the device activates the power-on
reset circuit which holds RESET/RESET active for a
period of time. This allows the power supply and oscilla-
tor to stabilize before the processor can execute code.
The device’s low VCC detection circuitry protects the
user’s system from low voltage conditions by holding
RESET/RESET active when VCC falls below a minimum
VCC trip point. RESET/RESET remains asserted until
VCC returns to proper operating level and stabilizes. Five
industry
standard
VTRIP thresholds are available,
however, Intersil’s unique circuits allow the threshold to
be reprogrammed to meet custom requirements or to
fine-tune the threshold in applications requiring higher
precision.
BLOCK DIAGRAM
Data
Register
Command
Decode &
Control
Logic
SI
SO
SCK
CS
VCC
Reset
Timebase
Power-on and
Generation
VTRIP
+
-
RESET/RESET
Reset
Low Voltage
Status
Register
Protect Logic
16Kbits
16Kbits
32Kbits
WP
X5648 = RESET
X5649 = RESET
Data Sheet
March 17, 2005


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