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X5083P-2.7 Datasheet(PDF) 1 Page - Intersil Corporation |
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X5083P-2.7 Datasheet(HTML) 1 Page - Intersil Corporation |
1 / 20 page 1 ® FN8127.2 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved All other trademarks mentioned are the property of their respective owners. X5083 CPU Supervisor with 8Kbit SPI EEPROM This device combines four popular functions, Power-on Reset Control, Watchdog Timer, Supply Voltage Supervision, and Block Lock Serial EEPROM Memory in one package. This combination lowers system cost, reduces board space requirements, and increases reliability. Applying power to the device activates the power-on reset circuit which holds RESET active for a period of time. This allows the power supply and oscillator to stabilize before the processor can execute code. The Watchdog Timer provides an independent protection mechanism for microcontrollers. When the microcontroller fails to restart a timer within a selectable time out interval, the device activates the RESET signal. The user selects the interval from three preset values. Once selected, the interval does not change, even after cycling the power. The device’s low VCC detection circuitry protects the user’s system from low voltage conditions, resetting the system when VCC falls below the minimum VCC trip point. RESET is asserted until VCC returns to the proper operating level and stabilizes. Five industry standard VTRIP thresholds are available, however, Intersil’s unique circuits allow the threshold to be reprogrammed to meet custom requirements or to fine- tune the threshold for applications requiring higher precision. Pinouts 8 Ld TSSOP 8 Ld SOIC, 8 Ld PDIP Features •Low VCC detection and reset assertion - Four standard reset threshold voltages 4.63V, 4.38V, 2.93V, 2.63V - Re-program low VCC reset threshold voltage using special programming sequence - Reset signal valid to VCC = 1V • Selectable time out watchdog timer • Long battery life with low power consumption - <50µA max standby current, watchdog on - <1µA max standby current, watchdog off - <400µA max active current during read • 8Kbits of EEPROM • Save critical data with Block Lock™ memory - Block lock first or last page, any 1/4 or lower 1/2 of EEPROM array • Built-in inadvertent write protection - Write enable latch - Write protect pin • SPI Interface - 3.3MHz clock rate • Minimize programming time - 16 byte page write mode - 5ms write cycle time (typical) • SPI modes (0,0 & 1,1) • Available packages - 8 Ld TSSOP, 8 Ld SOIC, 8 Ld PDIP • Pb-free plus anneal available (RoHS compliant) Applications • Communications Equipment - Routers, Hubs, Switches - Set Top Boxes • Industrial Systems - Process Control - Intelligent Instrumentation • Computer Systems - Desktop Computers - Network Servers • Battery Powered Equipment SCK SI VSS WP VCC CS/WDI SO 1 2 3 4 8 7 6 5 X5083 RESET X5083 CS/WDI WP SO 1 2 3 4 RESET 8 7 6 5 VCC VSS SCK SI Data Sheet September 16, 2005 |
Similar Part No. - X5083P-2.7 |
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Similar Description - X5083P-2.7 |
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