1

®

FN8222.1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 1-888-468-3774

XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved

All other trademarks mentioned are the property of their respective owners.

X9C102, X9C103, X9C104, X9C503

Digitally Controlled Potentiometer

(XDCP™)

FEATURES

• Solid-state potentiometer

• 3-wire serial interface

• 100 wiper tap points

—Wiper position stored in nonvolatile memory

and recalled on power-up

• 99 resistive elements

—Temperature compensated

—End to end resistance, ±20%

—Terminal voltages, ±5V

• Low power CMOS

—Active current, 3mA max.

—Standby current, 750µA max.

• High reliability

—Endurance, 100,000 data changes per bit

—Register data retention, 100 years

• X9C102 = 1k

Ω

• X9C103 = 10k

Ω

• X9C503 = 50k

Ω

• X9C104 = 100k

Ω

• Packages

—8-lead SOIC and DIP

• Pb-free plus anneal available (RoHS compliant)

DESCRIPTION

The X9Cxxx are Intersil digitally controlled (XDCP)

potentiometers. The device consists of a resistor

array, wiper switches, a control section, and nonvola-

tile memory. The wiper position is controlled by a

three-wire interface.

The potentiometer is implemented by a resistor array

composed of 99 resistive elements and a wiper switch-

ing network. Between each element and at either end

are tap points accessible to the wiper terminal. The

position of the wiper element is controlled by the CS,

U/D, and INC inputs. The position of the wiper can be

stored in nonvolatile memory and then be recalled

upon a subsequent power-up operation.

The device can be used as a three-terminal potentiom-

eter or as a two-terminal variable resistor in a wide

variety of applications including:

– control

– parameter adjustments

– signal processing

BLOCK DIAGRAM

Up/Down

(INC)

Increment

Device

(U/D)

(CS)

7-Bit

Up/Down

Counter

7-Bit

Nonvolatile

Memory

Store and

Recall

Control

Circuitry

One

of

Hundred

Decoder

Resistor

Array

U/D

INC

CS

Transfer

GND

One-

Gates

99

98

97

96

2

1

0

Control

and

Memory

General

Detailed

Select

Data Sheet

September 19, 2005