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X4C105V20I Datasheet(PDF) 10 Page - Intersil Corporation

Part # X4C105V20I
Description  CPU Supervisor with NOVRAM and Output Ports
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

X4C105V20I Datasheet(HTML) 10 Page - Intersil Corporation

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10
FN8124.0
March 18, 2005
ABSOLUTE MAXIMUM RATINGS
Temperature under bias .................... -65°C to +135°C
Storage temperature ......................... -65°C to +150°C
Voltage on any pin with
respect to ground .................................-1.0V to 7.0V
DC output current ................................................ 5 mA
Lead temperature (soldering, 10 seconds) ........ 300°C
COMMENT
Stresses above those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device.
This is a stress rating only; the functional operation of
the device (at these or any other conditions above
those indicated in the operational sections of this specifi-
cation) is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
DC OPERATING CHARACTERISTICS VCC = 3.0 to 3.6V at -40°C to +85°C unless otherwise specified.
Notes: (1) The device enters the active state after any start, and remains active until: 9 clock cycles later if the device select bits in the slave
address byte are incorrect; 200ns after a stop ending a read operation; or tWC after a stop ending a write operation.
(2) The device goes into standby: 200ns after any stop, except those that initiate a high voltage write cycle; tWC after a stop that initiates a
high voltage cycle; or 9 clock cycles after any start that is not followed by the correct device select bits in the slave address byte.
(3) VIL min. and VIH max. are for reference only and are not tested.
Symbol
Parameter
Min.
Max.
Unit
Test Conditions
ICC1(1)
Active supply current serial
read or serial write (does
not include the nonvolatile
store operation)
2.0
mA
VIL = VCC x 0.1, VIH = VCC x 0.9, fSCL = 400kHz,
SDA = Read/Write Operation, CE, OE, WE,
D0-D3 = VIH; O0-O3, RESET = Open CAP is
tied to VCC; VCC > VTRIP
ICC2(1)
Average active supply
current during serial non-
volatile store operation
3.0
mA
VIL = VCC x 0.1, VIH = VCC x 0.9, SCL,
SDA = VIH; WP, S1, S2 = VIL, CE, OE, WE,
D0-D3 = VIH; O0-O3, RESET = Open CAP is tied
to VCC. Test during the N.V. write cycle.
ICC3(1)
Active supply current
volatile NOVRAM read
3.0
mA
VIL = VCC x 0.1, VIH = VCC x 0.9, SCL,
SDA = VIH; WP, S1, S2 = VIL, WE = VIH; CE,
OE = VIL, D0-D3, O0-O3, RESET = Open CAP is
tied to VCC; VCC > VTRIP
ICC4(1)
Active supply current
volatile NOVRAM write
3.0
mA
VIL = VCC x 0.1, VIH = VCC x 0.9, SCL,
SDA = VIH; WP, S1, S2 =VIL, OE = VIH; CE,
WE = VIL, D0-D3 = VIL or VIH, O0-O3,
RESET = Open CAP is tied to VCC; VCC > VTRIP
ICC5(1)
Average active supply
current over NOVRAM
store, or active current dur-
ing recall
3.0
mA
VIL = VCC x 0.1, VIH = VCC x 0.9, SCL, SDA, VIH;
WP, S1, S2 = VIL, WE, CE, OE = VIH;
D0-D3, O0-O3, RESET = Open CAP is tied to
VCC, VCC < VTRIP for Store; VCC > VTRIP for Re-
call
ISB1(1)
Standby current
50
µAV
IL = VCC x 0.1, VIH = VCC x 0.9, SCL, SDA, CE,
WE, OE, D0-D3, = VIH, WP = VIL, O0-O3,
RESET = Open; CAP is tied to VCC
ILI
Input leakage current
10
µAV
IN = GND to VCC
ILO
Output leakage current
10
µAV
SDA = GND to VCC; Device is in Standby
(2)
VIL(3)
Input LOW voltage
-0.5
VCC x 0.3
V
VIH(3
Input HIGH voltage
VCC x 0.7 VCC + 0.5
V
VHYS
Schmitt trigger input
hysteresis
.05 x VCC
V
VOL
Output LOW voltage
0.4
V
IOL = 2.0mA, VCC = 3.3V
VOH
Output HIGH voltage
VCC - 0.4
V
IOH = -1mA, VCC = 3.3V
X4C105


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