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ISL95711WIU10Z Datasheet(PDF) 10 Page - Intersil Corporation |
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ISL95711WIU10Z Datasheet(HTML) 10 Page - Intersil Corporation |
10 / 12 page 10 FN8241.2 August 15, 2005 Communicating with the ISL95711 There are 3 register addresses in the ISL95711, of which two can be used. Address 00h and address 02h are used to control the device. Address 01h is reserved and should not be used. Address 00h contains the non-volatile Initial Value Register (IVR), and the volatile Wiper Register (WR). Address 02h contains only a volatile word and is used as a pointer to either the IVR or WR. See Table 1. Register Descriptions: Access Control The Access Control Register (ACR) is volatile and is at address 02h. It is 8-bits, and only the MSB is significant, all other bits should be zero (0). The ACR controls which word is accessed at register 00h as follows: 00h = Nonvolatile IVR 80h = Volatile WR All other bits of the ACR should be written to as zeros. Only the MSB can be either 0 or 1. Power-up default for this address is 00h. Register Description: IVR and WR The ISL95711 has a single potentiometer. The wiper of the potentiometer is controlled directly by the WR. Writes and reads can be made directly to this register to control and monitor the wiper position without any non-volatile memory changes. This is done by setting address 02h to data 80h, then writing the data. The non-volatile IVR stores the power-up value of the wiper. On power-up, the contents of the IVR are transferred to the WR. To write to the IVR, first address 02h is set to data 00h, then the data is written. Writing a new value to the IVR register will set a new power-up position for the wiper. Also, writing to this register will load the same value into the WR as the IVR. So, if a new value is loaded into the IVR, not only will the non-volatile IVR change, but the WR will also contain the same value after the write, and the wiper position will change. Reading from the IVR will not change the WR, if its contents are different. FIGURE 3. BYTE WRITE SEQUENCE FIGURE 4. READ SEQUENCE S T A R T S T O P IDENTIFICATION BYTE ADDRESS BYTE DATA BYTE A C K SIGNALS FROM THE MASTER SIGNALS FROM THE ISL95711 A C K 0 0 0 11 A C K WRITE SIGNAL AT SDA 00 0 0 00 000 A1A0 0 SIGNALS FROM THE MASTER SIGNALS FROM THE SLAVE SIGNAL AT SDA S T A R T IDENTIFICATION BYTE WITH R/W=0 ADDRESS BYTE A C K A C K 00 0 11 S T O P A C K 0 1 0 11 IDENTIFICATION BYTE WITH R/W=1 A C K S T A R T LAST READ DATA BYTE FIRST READ DATA BYTE A C K 00 00 0 0 0 0 A1 A0 A1 A0 0 ISL95711 |
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