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M5M564R16DTP-15 Datasheet(PDF) 4 Page - Mitsubishi Electric Semiconductor |
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M5M564R16DTP-15 Datasheet(HTML) 4 Page - Mitsubishi Electric Semiconductor |
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4 / 7 page  M5M564R16DJ,TP-10,-12,-15 MITSUBISHI LSIs 1048576-BIT (65536-WORD BY 16-BIT) CMOS STATIC RAM MITSUBISHI ELECTRIC M5M564R16D-10 M5M564R16D-12 M5M564R16D-15 M5M564R16D-10 M5M564R16D-12 M5M564R16D-15 tdis(S) tdis(OE) tdis(B) Output disable time after LB,UB high Output disable time after S high Output disable time after OE high ten(B) ten(S) ten(OE) Output enable time after LB,UB low Output enable time after S low Output enable time after OE low READ CYCLE ns ns ns ns tCR ta(A) ta(OE) ta(S) tv(A) 56 7 ta(B) LB,UB access time Symbol Parameter Read cycle time Address access time Chip select access time Output enable access time Data valid time after address change Unit Limits Max Min Max Min Max Min tPU Power-up time after chip selection tPD Power down time after chip selection 000 Write cycle t CW tw(W) tsu(A-WH) tsu(A)1 th(D) tsu(D) tsu(S) trec(W) tdis(W) ten(W) ten(OE) tdis(OE) ns LB,UB setup time ten(B) Output enable time after LB,UB low tsu(B) tsu(A-SH) tsu(A-BH) Address to LB,UB High 10 12 15 Symbol Parameter Write cycle time Write pulse width Address setup time(W) Chip select setup time Data setup time Data hold time Write recovery time Output enable time after OE low Output disable time after OE high Address to W High Unit Limits Max Min Output disable time after W low Output enable time after W high Address to S High 56 7 00 0 00 0 10 12 15 44 4 ns ns ns ns ns 56 7 00 ns 33 ns 33 ns 4 4 ns ns 56 7 0 3 3 4 56 7 10 12 15 10 12 15 10 12 15 Max Min Max Min tsu(A)2 Address setup time(S) ns 9 10 12 ns 9 10 12 ns 0 00 ns 0 0 0 ns 910 12 ns 56 7 ns 0 00 ns 0 00 0 00 0 00 5 67 5 67 0 00 0 00 0 00 9 10 12 9 10 12 9 10 12 4 ns ns ns ns ns ns ns ns |
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