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SC91651B Datasheet(PDF) 10 Page - Silan Microelectronics Joint-stock |
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SC91651B Datasheet(HTML) 10 Page - Silan Microelectronics Joint-stock |
10 / 30 page Silan Semiconductors SC91650/1/2 A/B HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD REV: 1.0 2001.01.15 10 (continued) Pin No. 650A/B 651A/B 652A/B Pin Name Description 11 11 HFI *Handfree input control pin. (SC91650, SC91651) *Toggle input structure, rising edge trigger. *It is used to enable and disable Handfree funtion. *With waveshaped by a built-in Schmit trigger, the bounce of input can be eliminated by external R•C debounce circuit. * A built-in pull down resistor is 200k Ω typical. 11 HFI * Toggle input structure with pull up resistance 200k Ω, falling edge trigger. (SC91652) 12 12 12 HFO * Handfree output pin. * Inverter output structure (normally ‘low’, active ‘high’). * When a HFI pin is active, Handfree function will be enabled (HFO=1) or disable (HFO=0). * When the Handfree function is enable (HFO=1), after OFF-HOOK action, it can reset Handfree function and HFO pin return to ‘low’ state. 11 HDI *Hold line input control pin. *Toggle input structure, falling edge trigger. *It is used to enable and disable Hold line function. *With waveshaped by a built-in Schmit trigger, the bounce of input can be eliminated by extenal R.C debounce circuit. *A built-in pull up resistor is 200k Ω typically. 22 22 HDO *Hold line output pin. *Inverter output structure, falling edge trigger. *When a falling edge signal triggered HDI pin, Hold line function will be enable (HDO=1) or disabled(HDO=0). *When the Hold line function is enable (HDO=1), after OFF-HOOK action or HFO pin is from “low” to “high”, it can reset Hold line function and HDO pin return to “low” state. 22 KT *Keytone output pin for ralid key pad input and memory stored (SC91652 only). *CMOS invertor output structure. *It will issue a 1.2kHz, duty cycle 50% signal with duration 30ms. *To prevent signal interference, while DTMF issue, it will disable Keytone output except function key. 1PMUTE *Pulse mode mute. *CMOS inverter output structure. *The output is high state during dialing sequence (pulse mode only), otherwise this pin is low. |
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