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DP8419N-80 Datasheet(PDF) 9 Page - National Semiconductor (TI) |
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DP8419N-80 Datasheet(HTML) 9 Page - National Semiconductor (TI) |
9 / 28 page DP8419 Mode Descriptions (Continued) DP8419 Interface Between System DRAM Banks TLF8396 – 5 FIGURE 1a DP8419 with any 16k DRAMS TLF8396 – 6 Only LS 7 Bits of Refresh Counter used for the 7 Row Addresses MSB not used but can toggle FIGURE 1b DP8419 with 128 Row x 512 Column 64k DRAM TLF8396 – 7 8 Bits of Refresh Counter Used FIGURE 1c DP8419 with 256 Row x 256 Column 64k DRAM TLF8396 – 8 All 9 Bits of Refresh Counter Used FIGURE 1d DP8419 with 256k DRAMs 9 |
Similar Part No. - DP8419N-80 |
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Similar Description - DP8419N-80 |
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