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DP8419D-80 Datasheet(PDF) 2 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # DP8419D-80
Description  64k, 256k Dynamic RAM Controller/Drivers
Download  28 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

DP8419D-80 Datasheet(HTML) 2 Page - National Semiconductor (TI)

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General Description (Continued)
In order to specify each device for ‘‘true’’ worst case operat-
ing conditions all timing parameters are guaranteed while
the chip is driving the capacitive load of 88 DRAMs includ-
ing trace capacitance The chip’s delay timing logic makes
use of a patented new delay line technique which keeps
AC skew to g3 ns over the full VCC range of g10% and
temperature range of b55 Cto a125 C The DP8417
DP8418 DP8419 and DP8419X guarantee a maximum
RASIN to CASOUT delay of 80 ns or 70 ns even while driv-
ing a 2 Mbyte memory array with error correction check bits
included Speed selected options of these devices are
shown in the switching characteristics section of this docu-
ment
With its four independent RAS outputs and nine multiplexed
address outputs the DP8419 can support up to four banks
of 16k 64k or 256k DRAMs Two bank select pins B1 and
B0 are decoded to activate one of the RAS signals during
an access leaving the three non-selected banks in the
standby mode (less than one tenth of the operating power)
with data outputs in TRI-STATE
The DP8419 has two mode-select pins allowing for two re-
fresh modes and two access modes Refresh and access
timing may be controlled either externally or automatically
The automatic modes require a minimum of input control
signals
A refresh counter is on-chip and is multiplexed with the row
and column inputs Its contents appear at the address out-
puts of the DP8419 during any refresh and are incremented
at the completion of the refresh RowColumn and bank
address latches are also on-chip However if the address
inputs to the DP8419 are valid throughout the duration of
the access these latches may be operated in the fall-
through mode
System Companion Components
Device
Function
DP84300
Programmable Refresh Timer for DP84xx DRAM Controller
DP84412
NS320081632 to DP8409A1718192829 Interface
DP84512
NS32332 to DP841718192829 Interface
DP84322
680000810 to DP8409A1718192829 Interface (up to 8 MHz)
DP84422
680000810 to DP8409A1718192829 Interface (up to 125 MHz)
DP84522
68020 to DP841718192829 Interface
DP84432
808688186188 to DP8409A1718192829 Interface
DP84532
80286 to DP8409A1718192829 Interface
DP8400-2
16-bit Expandable Error CheckerCorrector
DP8400-4
16-bit Expandable Error CheckerCorrector
DP8402A
32-bit Error Detector and Corrector (EDAC)
2


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