©2004 Fairchild Semiconductor Corporation

RMPA39200 Rev. C

C1

0.1

µF

C2

0.47

µF

LM2941T

U1A

7400

R1

3.0k

R3

1.0k

D2

D1N6098

+6V

D3

D1N6098

+2.62V

R4

1.2k

*

R2

6.8k

U2

0

C5

0.1

µF

MMIC_–VG

0

C3

22

µF

R6

1k

R5

3k

0

0

C4

0.1

µF

R7

8.2k

–5V Off:

–5V Off:

+3.33V

+1.80V

*

0

0

0

R8

1.0k

0

1

2

3

0

4

2

1

5

3

–5V

MMIC_+VDD

CNT

IN

GND

OUT

ADJ

AD820/AD

+

–

V-

V+

Recommended Procedure for Biasing and Operation

CAUTION: LOSS OF GATE VOLTAGE (Vg) WHILE

DRAIN VOLTAGE (Vd) IS PRESENT MAY DAMAGE THE

AMPLIFIER CHIP.

The following sequence of steps must be followed to

properly test the amplifier.

Step 1: Turn off RF input power.

Step 2: Connect the DC supply grounds to the ground of

the chip carrier. Slowly apply negative gate bias supply

voltage of -1.5V to Vg.

Step 3: Slowly apply positive drain bias supply voltage of

+5V to Vd.

Step 4: Adjust gate bias voltage to set the quiescent

current of Idq = 1600mA.

Step 5: After the bias condition is established, the RF input

signal may now be applied at the appropriate frequency

band.

Step 6: Follow turn-off sequence of:

(i) Turn off RF input power,

(ii) Turn down and off drain voltage (Vd),

(iii) Turn down and off gate bias voltage (Vg).

Note: An example auto bias sequencing circuit to apply

negative gate voltage and positive drain voltage for the

above procedure is shown below.