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UPD784217A Datasheet(PDF) 9 Page - NEC |
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UPD784217A Datasheet(HTML) 9 Page - NEC |
9 / 60 page Data Sheet U14125EJ1V0DS00 9 µµµµPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY •••• 100-pin plastic QFP (14 ×××× 20) µµµµPD78F4216AGF-3BA, µµµµPD78F4218AGF-3BA, µµµµPD78F4216AYGF-3BA, µµµµPD78F4218AYGF-3BA Notes 1. Connect the VPP pin to VSS directly or via a pull-down resistor in normal operation mode. Connect the VPP pin to VSS via a pull-down resistor in a system in which the on-chip flash memory is written while mounted on the target board. For the pull-down connection, it is recommended to use a resistor with a resistance ranging from 470 Ω to 10 kΩ. 2. Connect the AVDD pin to VDD. 3. Connect the AVSS pin to VSS. 4. The SCL0 and SDA0 pins are available in the µPD78F4216AY, 78F4218AY only. 5. The EXA pin is available in the µPD78F4218A, 78F4218AY only. 100 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 P84/A4 P83/A3 P82/A2 P81/A1 P80/A0 P27/SCK0/SCL0Note 4 P26/SO0 P25/SI0/SDA0Note 4 P24/BUZ P23/PCL P22/ASCK1/SCK1 P21/TxD1/SO1 P20/RxD1/SI1 P72/ASCK2/SCK2 P71/TxD2/SO2 P70/RxD2/SI2 AVREF1 P131/ANO1 P130/ANO0 AVSSNote 3 P17/ANI7 P16/ANI6 P15/ANI5 P14/ANI4 P13/ANI3 P12/ANI2 P11/ANI1 P10/ANI0 AVREF0 AVDDNote 2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 P60/A16 P61/A17 P62/A18 P63/A19 P64/RD P65/WR P66/WAIT P67/ASTB VDD P100/TI5/TO5 P101/TI6/TO6 P102/TI7/TO7 P103/TI8/TO8 P30/TO0 P31/TO1 P32/TO2 P33/TI1 P34/TI2 P35/TI00 P36/TI01 P37/EXANote 5 VPPNote 1 P90 P91 P92 P93 P94 P95 P120/RTP0 P121/RTP1 31 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 |
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