NCP1201D100R2 datasheet(11/20 Pages) ONSEMI

Part #	NCP1201D100R2

Description	PWM Current-Mode Controller for Universal Off-Line Supplies Featuring Low Standby Power with Fault Protection Modes

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NCP1201

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11

Our power contribution example drops to 223 V x 2.1 mA

= 468.3 mW. If a resistor is installed between the mains and

the diode, you further force the dissipation to migrate from

the package to the resistor. The resistor value should be

carefully selected to account for low−line startup.

1

2

3

4

8

7

6

5

Figure 28. A Simple Diode Naturally Reduces the

Average Voltage on Pin 8

Mains

HV

Cbulk

3. Permanently force the VCC level above VCCOFF

with an auxiliary winding. It will automatically

disconnect the internal startup source and the IC

will be fully self−supplied from this winding.

Again, the total power drawn from the mains will

significantly decrease. By using this approach,

user need to make sure the auxiliary voltage never

exceeds the 16 V limit for all line conditions.

Skipping Cycle Mode

The NCP1201 automatically skips switching cycles when

the output power demand drops below a preset level. This is

accomplished by monitoring the FB pin. In normal

operation, FB pin imposes a peak current according to the

load value. If the load demand decreases, the internal loop

asks for less peak current. When this set−point reaches the

skip mode threshold level, 1.07 V, the IC prevents the

current from decreasing further down and starts to blank the

output pulses, i.e. the controller enters the so−called Skip

Cycle Mode, also named Controlled Burst Operation. The

power transfer now depends upon the width of the pulse

bunches, Figure 29.

Suppose we have the following component values:

Lp, primary inductance = 1.0 mH

Fsw, switching frequency = 60 kHz

Ip (skip) = 200 mA (or 333 mV/Rsense)

The theoretical power transfer is therefore:

1

2

Lp

Ip2

Fsw + 1.2 W

(eq. 4)

If the controller enters Skip Cycle Mode with a pulse

packet length of 20 ms over a recurrent period of 100 ms,

then the total power transfer reduced to 1.2 W x 0.2 =

240 mW.

To better understand how this Skip Cycle Mode takes

place, a look at the operation mode versus the FB pin voltage

level shown below, immediately gives the necessary insight.

1.07 V

4.2 V, FB Pin Open

FB

Normal Current Mode Operation

Skip Cycle Operation

Ip(min) = 333 mV / Rsense

Figure 29. Feedback Pin Voltage and Modes of Operation

2.97 V, Upper Dynamic Range

When FB pin voltage level is above the skip cycle threshold

(1.07 V by default), the peak current cannot exceed

0.9 V/Rsense. When the IC enters the skip cycle mode, the

peak current cannot go below VSKIP/3.3. By using the peak

current limit reduction scheme, the skip cycle takes place at

a lower peak current, which guarantees noise free operation.

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NCP1201D100R2 Datasheet(PDF) 11 Page - ON Semiconductor

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