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EDS1232AATA-60-E Datasheet(PDF) 5 Page - Elpida Memory

Part # EDS1232AATA-60-E
Description  128M bits SDRAM (4M words x 32 bits)
Download  53 Pages
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Manufacturer  ELPIDA [Elpida Memory]
Direct Link  http://www.elpida.com/en
Logo ELPIDA - Elpida Memory

EDS1232AATA-60-E Datasheet(HTML) 5 Page - Elpida Memory

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EDS1232AATA
Data Sheet E0386E40 (Ver. 4.0)
5
DC Characteristics 1 (TA = 0 to +70
°°°°C, VDD, VDDQ = 3.3V±±±±0.3V, VSS, VSSQ = 0V)
Parameter
/CAS latency
Symbol
Grade
max.
Unit
Test condition
Notes
Operating current
(CL = 2)
IDD1
-60
-75
120
105
mA
1
(CL = 3)
IDD1
-60
-75
120
105
mA
Burst length = 1
tRC
≥ tRC (min.)
IO = 0mA
One bank active
Standby current in power down
IDD2P
1
mA
Standby current in power down
(input signal stable)
IDD2PS
1
mA
CKE
≤ VIL (max.) tCK = 15ns
CKE
≤ VIL (max.) tCK = ∞
Standby current in non power
down
IDD2N
20
mA
CKE
≥ VIH (min.) tCK = 15ns
CS
≥ VIH (min.)
Input signals are changed one
time during 30ns
Standby current in non power
down
(input signal stable)
IDD2NS
8
mA
CKE
≥ VIH (min.) tCK = ∞
Active standby current in power
down
IDD3P
5
mA
CKE
≤ VIL (max.) tCK = 15ns
Active standby current in power
down (input signal stable)
IDD3PS
4
mA
CKE
≤ VIL (max.), tCK = ∞
Active standby current in non
power down
IDD3N
25
mA
CKE
≥ VIH (min.), tCK = 15 ns,
/CS
≥ VIH (min.),
Input signals are changed one
time during 30ns.
Active standby current in non
power down
(input signal stable)
IDD3NS
15
mA
CKE
≥ VIH (min.), tCK = ∞,
Burst operating current
IDD4
-60
-75
200
180
mA
tCK
≥ tCK (min.),
IO = 0mA, All banks active
2
Refresh current
IDD5
-60
-75
240
210
mA
tRC
≥ tRC (min.)
3
Self refresh current
IDD6
2.0
mA
VIH
≥ VDD − 0.2V,
VIL
≤ GND + 0.2V
Self refresh current
(L-version)
IDD6
-xxL
0.6
mA
Notes: 1. IDD1 depends on output loading and cycle rates. Specified values are obtained with the output open. In
addition to this, IDD1 is measured condition that addresses are changed only one time during tCK (min.).
2. IDD4 depends on output loading and cycle rates. Specified values are obtained with the output open.
In addition to this, IDD4 is measured condition that addresses are changed only one time during tCK
(min.).
3. IDD5 is measured on condition that addresses are changed only one time during tCK (min.).
DC Characteristics 2 (TA = 0 to +70
°°°°C, VDD, VDDQ = 3.3V±±±±0.3V, VSS, VSSQ = 0V)
Parameter
Symbol
min.
max.
Unit
Test condition
Note
Input leakage current
ILI
–1.0
1.0
µA
0
≤ VIN ≤ VDDQ, VDDQ = VDD,
All other pins not under test = 0V
Output leakage current
ILO
–1.5
1.5
µA
0
≤ VIN ≤ VDDQ, DOUT is disabled
Output high voltage
VOH
2.4
V
IOH = –2 mA
Output low voltage
VOL
0.4
V
IOL = 2 mA


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