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HM514260CJ-7 Datasheet(PDF) 8 Page - Hitachi Semiconductor |
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HM514260CJ-7 Datasheet(HTML) 8 Page - Hitachi Semiconductor |
8 / 27 page HM514260C, HM51S4260C Series 8 DC Characteristics (Ta = 0 to 70 °C, V CC = 5 V ±5%, VSS = 0 V) (HM51(S)4260C-6R) (Ta = 0 to 70 °C, V CC = 5 V ±10%, VSS = 0 V) (HM51(S)4260C-6/7/8) (cont) HM514260C, HM51S4260C -6/-6R -7 -8 Parameter Symbol Min Max Min Max Min Max Unit Test Conditions Input leakage current I LI –10 10 –10 10 –10 10 µA 0 V ≤ Vin ≤ 6.5 V Output leakage current I LO –10 10 –10 10 –10 10 µA 0 V ≤ Vout ≤ 6.5 V, Dout = disable Output high voltage V OH 2.4 V CC 2.4 V CC 2.4 V CC V High Iout = –5.0 mA Output low voltage V OL 0 0.4 0 0.4 0 0.4 V Low Iout = 4.2 mA Notes: 1. I CC depends on output load condition when the device is selected. I CC max is specified at the output open condition. 2. Address can be changed once or less while RAS = V IL. 3. Address can be changed once or less while UCAS and LCAS = V IH. 4. V IH ≥ V CC – 0.2 V, 0 ≤ V IL ≤ 0.2 V, Address can be changed once or less while RAS = VIL 5. All the V CC pins shall be supplied with the same voltage. And all the V SS pins shall be supplied with the same voltage. Capacitance (Ta = +25 °C, V CC = 5 V ±5%) (HM51(S)4260C-6R) (Ta = +25 °C, V CC = 5 V ±10%) (HM51(S)4260C-6/7/8) Parameter Symbol Typ Max Unit Notes Input capacitance (Address) C I1 — 5pF 1 Input capacitance (Clocks) C I2 — 7pF 1 Output capacitance (Data-in, Data-out) C I/O — 10 pF 1, 2 Notes: 1. Capacitance measured with Boonton Meter or effective capacitance measuring method. 2. UCAS and LCAS = V IH to disable Dout |
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Similar Description - HM514260CJ-7 |
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