Electronic Components Datasheet Search |
|
A64E06161G-85 Datasheet(PDF) 11 Page - AMIC Technology |
|
A64E06161G-85 Datasheet(HTML) 11 Page - AMIC Technology |
11 / 20 page A64E06161 3. Partial Array Refresh (PAR) mode In this mode, customers can turn off section of A64E06161 in stand-by mode to save standby current. The A64E06161 is divided into four 4M sections allowing certain section to be active. The array partition to be refreshed is determined by the respective bit in the CR register. When ZZ is active low, only the portion of the array that is set in the CR register is refreshed and the data is keep at a certain section of memory. The Partial Array Refresh (PAR) mode is only available during standby time ( ZZ low). Once ZZ is turned high, the A64E06161 goes back to operating in full array refresh. For Partial Array Refresh (PAR) mode to be activated, the register bit, A4 must be set to a “1” value. To change the address space of the Partial Array Refresh (PAR) mode, the CR register must be updated using the CR register description. If the CR register is not updated after power on, the A64E06161 will be in its default state and the whole memory array will be refreshed. Partial Array Refresh – Entry/Exit Partial Array Mode/ Deep Power Down Mode CE or UB / LB 1us suspend tCDR tR ZZ Figure 2: Partial Array refresh – Entry/Exit Partial Array Mode Timings Parameter Description Min. Max. Unit tZZWE ZZ LOW to WE LOW 1 µs tCDR Chip Deselect to ZZ LOW 0 µs tR Operation Recovery Time (Deep Power Down Mode only) 200 µs tZZMIN Deep Power Down Mode Time 10 µs tZZCE ZZ LOW to CE LOW 0 1 µs tZZBE ZZ LOW to LD UB / LOW 0 1 µs Notes: 1. OE and the data pins are in a “don’t care” state while the device is in Partial Array Mode. 2. All other timing parameters are as shown in the switching characteristics section. 3. tR applies only in the Deep Power Down Mode. 4. Temperature Compensated Refresh (TCR) mode In this mode, the hidden refresh rate can be optimized for the operating temperature. At higher temperature, the DRAM cell must be refreshed more often than at lower temperature. By setting the temperature of operation in CR register, the refresh rate can be optimized to meet the low standby current at given operating temperature. There are four selections (+15 °C, +45°C, +70°C, +85°C) in the CR register description. PRELIMINARY (November, 2004, Version 0.1) 10 AMIC Technology, Corp. |
Similar Part No. - A64E06161G-85 |
|
Similar Description - A64E06161G-85 |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |