A29L004AUY-90F datasheet(5/39 Pages) AMICC

Part #	A29L004AUY-90F

Description	512K X 8 Bit CMOS 3.0 Volt-only, Boot Sector Flash Memory

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Manufacturer	AMICC [AMIC Technology]

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A29L004A Series

PRELIMINARY

(March, 2005, Version 0.0)

4

AMIC Technology, Corp.

Absolute Maximum Ratings*

Storage Temperature Plastic Packages . …… .0

°C to + 70°C

Ambient Temperature with Power Applied…… 0

°C to + 70°C

Voltage with Respect to Ground

VCC (Note 1) . . . . . . . . . . . . . . . . . . . …... . . . -0.5V to +4.0V

A9,

OE & RESET (Note 2) . . . . . . . . . . ….. . -0.5 to +12.5V

All other pins (Note 1) . . . . . . . . . . . ….. -0.5V to VCC + 0.5V

Output Short Circuit Current (Note 3) . . . . . . . ….. … 200mA

Notes:

1. Minimum DC voltage on input or I/O pins is -0.5V. During

voltage transitions, input or I/O pins may undershoot VSS

to -2.0V for periods of up to 20ns. Maximum DC voltage

on input and I/O pins is VCC +0.5V. During voltage

transitions, input or I/O pins may overshoot to VCC +2.0V

for periods up to 20ns.

2. Minimum DC input voltage on A9,

OE and RESET is

-

0.5V. During voltage transitions, A9,

OE and RESET

may overshoot VSS to -2.0V for periods of up to 20ns.

Maximum DC input voltage on A9 is +12.5V which may

overshoot to 14.0V for periods up to 20ns. ( RESET is

N/A on 32-pin PLCC & (s)TSOP)

3. No more than one output is shorted at a time. Duration of

the short circuit should not be greater than one second.

*Comments

Stresses above those listed under "Absolute Maximum

Ratings" may cause permanent damage to this device.

These are stress ratings only. Functional operation of

this

device

at

these

or

any other

conditions

above

those

indicated

in

the

operational

sections

of

these

specification is not implied or intended. Exposure to

the absolute maximum rating conditions for extended periods

may affect device reliability.

Operating Ranges

Commercial (C) Devices

Ambient Temperature (TA) . . . . . . . ….. . . . . . . 0

°C to +70°C

VCC Supply Voltages

VCC for all devices . . . . . . . . . . . . . . . ….. . . +2.7V to +3.6V

Operating ranges define those limits between which the

functionally of the device is guaranteed.

Device Bus Operations

This section describes the requirements and use of the

device bus operations, which are initiated through the

internal command register. The command register itself does

not occupy any addressable memory location. The register is

composed of latches that store the commands, along with

the address and data information needed to execute the

command. The contents of the register serve as inputs to the

internal state machine. The state machine outputs dictate the

function of the device. The appropriate device bus operations

table lists the inputs and control levels required, and the

resulting output. The following subsections describe each of

these operations in further detail.

Table 1. A29L004A Device Bus Operations

Operation

CE

OE

WE

RESET

(N/A 32-pin PLCC, (s)TSOP)

A0 – A18

I/O0 - I/O7

Read

L

H

AIN

DOUT

Write

L

H

L

H

AIN

DIN

CMOS Standby

VCC

± 0.3 V

X

VCC

± 0.3 V

X

High-Z

Output Disable

L

H

X

High-Z

Hardware Reset

X

L

X

High-Z

Sector Protect

(See Note 2)

L

H

L

VID

Sector Address,

A6=L, A1=H, A0=L

DIN

Sector Unprotect

(See Note 2)

L

H

L

VID

Sector Address,

A6=H, A1=H, A0=L

DIN

Temporary Sector

Unprotect

X

VID

AIN

DIN

Legend:

L = Logic Low = VIL, H = Logic High = VIH, VID = 12.0

± 0.5V, X = Don't Care, DIN = Data In, DOUT = Data Out, AIN = Address In

Notes:

1. See the “Sector Protection/Unprotection” section and Temporary Sector Unprotect for more information.

2. This function is not available on 32-pin PLCC & (s)TSOP packages.

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