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EPVP6200 Datasheet(PDF) 51 Page - ELAN Microelectronics Corp

Part No. EPVP6200
Description  VFD Controller
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Maker  EMC [ELAN Microelectronics Corp]
Homepage  http://www.emc.com.tw
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 51 page
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ePVP6200
VFD Controller
This specification is subject to change without further notice.
11.18.2004 (V1.53) 45 of 57
13 Key & Switch Scanning and Display Timing
The key & switch scanning and display timing diagram is given below. One cycle of key &
switch scanning consists of 2 frames. The data of the 12 x 4 matrix is stored in the RAM.
Fig. 18 Key & Switch Scanning and Display Timing Diagram
10/16
GRID 1
output
1/16
12/16
8/16
4/16
6/16
14/16
31.25 us
470 us
16/16
GRID 2
output
SEG 1
output
SEG 2
output
SEG 3
output
500 us
GRID 1
GRID 2
GRID 3
GRID n
Key & Switch scan data
DIG1
2/16
GRID 1
output
1 frame = TDISP * (n+1)
DISP ≒ 500us
2/16
SEG1
output
SEG2
output
SEG3
output
SEGn
output
14/16
GRID 2
output
GRID 3
output
GRID n
output
1/16
4/16
10/16




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